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VHDLExperiment01

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.78mb
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  • Author :郭****
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VHDL source code examples
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Experiment01\db\altsyncram_g204.tdf
............\..\altsyncram_ivv3.tdf
............\..\altsyncram_mdq1.tdf
............\..\cmpr_5cc.tdf
............\..\cmpr_8cc.tdf
............\..\cmpr_9cc.tdf
............\..\cntr_02j.tdf
............\..\cntr_45j.tdf
............\..\cntr_8ai.tdf
............\..\cntr_gui.tdf
............\..\cntr_sbi.tdf
............\..\cntr_ubi.tdf
............\..\decode_rqf.tdf
............\..\led0_module.amm.cdb
............\..\led0_module.asm.qmsg
............\..\led0_module.asm.rdb
............\..\led0_module.asm_labs.ddb
............\..\led0_module.cbx.xml
............\..\led0_module.cmp.bpm
............\..\led0_module.cmp.cbp
............\..\led0_module.cmp.cdb
............\..\led0_module.cmp.hdb
............\..\led0_module.cmp.kpt
............\..\led0_module.cmp.logdb
............\..\led0_module.cmp.rdb
............\..\led0_module.cmp.tdb
............\..\led0_module.cmp0.ddb
............\..\led0_module.cmp2.ddb
............\..\led0_module.cmp_merge.kpt
............\..\led0_module.db_info
............\..\led0_module.eda.qmsg
............\..\led0_module.fit.qmsg
............\..\led0_module.hier_info
............\..\led0_module.hif
............\..\led0_module.idb.cdb
............\..\led0_module.lpc.html
............\..\led0_module.lpc.rdb
............\..\led0_module.lpc.txt
............\..\led0_module.map.bpm
............\..\led0_module.map.cbp
............\..\led0_module.map.cdb
............\..\led0_module.map.hdb
............\..\led0_module.map.kpt
............\..\led0_module.map.logdb
............\..\led0_module.map.qmsg
............\..\led0_module.map_bb.cdb
............\..\led0_module.map_bb.hdb
............\..\led0_module.map_bb.logdb
............\..\led0_module.pre_map.cdb
............\..\led0_module.pre_map.hdb
............\..\led0_module.rtlv.hdb
............\..\led0_module.rtlv_sg.cdb
............\..\led0_module.rtlv_sg_swap.cdb
............\..\led0_module.sgdiff.cdb
............\..\led0_module.sgdiff.hdb
............\..\led0_module.sld_design_entry.sci
............\..\led0_module.sld_design_entry_dsc.sci
............\..\led0_module.smart_action.txt
............\..\led0_module.syn_hier_info
............\..\led0_module.tan.qmsg
............\..\led0_module.tis_db_list.ddb
............\..\logic_util_heursitic.dat
............\..\mux_aoc.tdf
............\..\mux_boc.tdf
............\..\prev_cmp_led0_module.asm.qmsg
............\..\prev_cmp_led0_module.eda.qmsg
............\..\prev_cmp_led0_module.fit.qmsg
............\..\prev_cmp_led0_module.map.qmsg
............\..\prev_cmp_led0_module.qmsg
............\..\prev_cmp_led0_module.tan.qmsg
............\..\prev_cmp_top_module.qmsg
............\..\top_module.ae.hdb
............\..\top_module.amm.cdb
............\..\top_module.asm.qmsg
............\..\top_module.asm.rdb
............\..\top_module.asm_labs.ddb
............\..\top_module.cbx.xml
............\..\top_module.cmp.bpm
............\..\top_module.cmp.cbp
............\..\top_module.cmp.cdb
............\..\top_module.cmp.hdb
............\..\top_module.cmp.kpt
............\..\top_module.cmp.logdb
............\..\top_module.cmp.rdb
............\..\top_module.cmp.tdb
............\..\top_module.cmp0.ddb
............\..\top_module.cmp2.ddb
............\..\top_module.cmp_merge.kpt
............\..\top_module.db_info
............\..\top_module.fit.qmsg
............\..\top_module.hier_info
............\..\top_module.hif
............\..\top_module.idb.cdb
............\..\top_module.lpc.html
............\..\top_module.lpc.rdb
............\..\top_module.lpc.txt
............\..\top_module.map.bpm
............\..\top_module.map.cbp
............\..\top_module.map.cdb
............\..\top_module.map.hdb
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