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AVR_Core

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 73kb
  • Downloaded :0次
  • Author :Cas***
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Synthesizable model of Atmel Application of ATmega103 mi crocontroller. (VHDL IP)
Packet file list
(Preview for download)
AVR_Core
........\Converters
........\..........\CVS
........\..........\...\Entries
........\..........\...\Repository
........\..........\...\Root
........\..........\GNR2VHD.EXE
........\..........\HEX2JAM.EXE
........\CVS
........\...\Entries
........\...\Repository
........\...\Root
........\Doc
........\...\AVRuCDescriptionSimul.doc
........\...\CVS
........\...\...\Entries
........\...\...\Repository
........\...\...\Root
........\VHDL
........\....\alu_avr.vhd
........\....\AVRuCPackage.vhd
........\....\avr_core.vhd
........\....\bit_processor.vhd
........\....\CPUWaitGenerator.vhd
........\....\CVS
........\....\...\Entries
........\....\...\Repository
........\....\...\Root
........\....\DataRAM.vhd
........\....\external_mux.vhd
........\....\io_adr_dec.vhd
........\....\io_reg_file.vhd
........\....\pm_fetch_dec.vhd
........\....\portx.vhd
........\....\PROM.VHD
........\....\RAMDataReg.vhd
........\....\reg_file.vhd
........\....\Service_Module.vhd
........\....\simple_timer.vhd
........\....\Timer_Counter.vhd
........\....\top_avr_core_sim.vhd
........\....\uart.vhd
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