FPGA-based table tennis game hardware circuit design and realization of a complete VHDL code. and a detailed account of how the PDF download and jumper settings and in a series of development platforms GW48 download debugging success!

EP1C3_10_2_TENNIS
.................\BALL.VHD
.................\BALLCTRL.VHD
.................\BOARD.VHD
.................\cmp_state.ini
.................\COU10.VHD
.................\COU4.VHD
.................\MWAY.VHD
.................\README
.................\......\GW48使用readme.txt
.................\SOUND.VHD
.................\TENNIS.asm.rpt
.................\TENNIS.CDF
.................\TENNIS.done
.................\TENNIS.fit.eqn
.................\TENNIS.fit.rpt
.................\TENNIS.fit.summary
.................\TENNIS.flow.rpt
.................\TENNIS.map.eqn
.................\TENNIS.map.rpt
.................\TENNIS.map.summary
.................\TENNIS.PIN
.................\TENNIS.QPF
.................\TENNIS.QSF
.................\TENNIS.QWS
.................\TENNIS.SOF
.................\TENNIS.tan.rpt
.................\TENNIS.tan.summary
.................\TENNIS.VHD
实验10_2.pdf

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