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hourse_race_light(7seg)

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 7kb
  • Downloaded :0次
  • Author :汪****
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
This is the company I used Xilnx the sparten3 FPGA development board. use integrated development environment ISE design of a Bomadeng procedures, it is like a small neon lights. For your reference.
Packet file list
(Preview for download)
hourse_race_light(7seg)
.......................\clk_div.vhd
.......................\ctrl.vhd
.......................\display.vhd
.......................\key_scan.vhd
.......................\top_7seg.bit
.......................\Top_7seg.vhd
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