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picoblaze07.3.20

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 918kb
  • Downloaded :0次
  • Author :赵****
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Introduction - If you have any usage issues, please Google them yourself
verilog HDL picoblaze07.3.20
Packet file list
(Preview for download)
picoblaze07.3.20
................\ASM2.V
................\compxlib.cfg
................\compxlib.log
................\device_usage_statistics.html
................\hc164_driver_02.v
................\kcpsm3.v
................\led_interface.v
................\led_total.v
................\modelsim.ini
................\pbus.v
................\picoblaze07.3.20.ipf
................\picoblaze07.3.20.ipf_ISE_Backup
................\picoblaze07.3.20.ise
................\picoblaze07.3.20.ise_ISE_Backup
................\picoblaze07.3.20.ntrc_log
................\pushbutton.v
................\system.bgn
................\system.bit
................\system.bld
................\system.cmd_log
................\system.drc
................\system.lso
................\system.ncd
................\system.ngc
................\system.ngd
................\system.ngr
................\system.pad
................\system.par
................\system.pcf
................\system.prj
................\system.stx
................\system.syr
................\system.twr
................\system.twx
................\system.ucf
................\system.unroutes
................\system.ut
................\system.v
................\system.xpi
................\system.xst
................\system_last_par.ncd
................\system_map.mrp
................\system_map.ncd
................\system_map.ngm
................\system_pad.csv
................\system_pad.txt
................\system_prev_built.ngd
................\system_summary.html
................\system_usage.xml
................\system_vhdl.prj
................\test.fdo
................\test.udo
................\testbeach.v
................\transcript
................\vga_controller.v
................\vga_controller.v.bak
................\vish_stacktrace.vstf
................\vsim.wlf
................\work
................\....\asm2
................\....\....\verilog.asm
................\....\....\_primary.dat
................\....\....\_primary.vhd
................\....\glbl
................\....\....\verilog.asm
................\....\....\_primary.dat
................\....\....\_primary.vhd
................\....\hc164_driver_02
................\....\...............\verilog.asm
................\....\...............\_primary.dat
................\....\...............\_primary.vhd
................\....\kcpsm3
................\....\......\verilog.asm
................\....\......\_primary.dat
................\....\......\_primary.vhd
................\....\led_interface
................\....\.............\verilog.asm
................\....\.............\_primary.dat
................\....\.............\_primary.vhd
................\....\led_total
................\....\.........\verilog.asm
................\....\.........\_primary.dat
................\....\.........\_primary.vhd
................\....\pbus
................\....\....\verilog.asm
................\....\....\_primary.dat
................\....\....\_primary.vhd
................\....\pushbutton
................\....\..........\verilog.asm
................\....\..........\_primary.dat
................\....\..........\_primary.vhd
................\....\system
................\....\......\verilog.asm
................\....\......\_primary.dat
................\....\......\_primary.vhd
................\....\test
................\....\....\verilog.asm
................\....\....\_primary.dat
................\....\....\_primary.vhd
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