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maxII16_cpu

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 215kb
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maxII16_cpu, altera the maxII series of 16 cpu
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专门用在ALtera第二代PLD MAXII上的16位微处理器IP核
.................................................\tiny16
.................................................\......\asm
.................................................\......\...\asm.exe
.................................................\......\...\asm.htm
.................................................\......\...\go.bat
.................................................\......\...\QB.INI
.................................................\......\...\STRIP8.BAS
.................................................\......\...\STRIP8.EXE
.................................................\......\...\test.asm
.................................................\......\...\TEST.MIF
.................................................\......\...\test.raw
.................................................\......\...\tinymacro.inc
.................................................\......\...\tinyphy.inc
.................................................\......\...\tinyset.inc
.................................................\......\...\tinyuart.inc
.................................................\......\flash.v
.................................................\......\lcd_controller.v
.................................................\......\smallram.v
.................................................\......\sram_controller.v
.................................................\......\sram_interface.v
.................................................\......\TEST.MIF
.................................................\......\tiny16.v
.................................................\......\tiny16_MAXII.asm.rpt
.................................................\......\tiny16_MAXII.cdf
.................................................\......\tiny16_MAXII.done
.................................................\......\tiny16_MAXII.drc.rpt
.................................................\......\tiny16_MAXII.fit.eqn
.................................................\......\tiny16_MAXII.fit.rpt
.................................................\......\tiny16_MAXII.fit.summary
.................................................\......\tiny16_MAXII.fld
.................................................\......\tiny16_MAXII.flow.rpt
.................................................\......\tiny16_MAXII.map.eqn
.................................................\......\tiny16_MAXII.map.rpt
.................................................\......\tiny16_MAXII.map.summary
.................................................\......\tiny16_MAXII.pin
.................................................\......\tiny16_MAXII.pof
.................................................\......\tiny16_MAXII.qpf
.................................................\......\tiny16_MAXII.qsf
.................................................\......\tiny16_MAXII.qws
.................................................\......\tiny16_MAXII.sim.rpt
.................................................\......\tiny16_MAXII.tan.rpt
.................................................\......\tiny16_MAXII.tan.summary
.................................................\......\tiny16_MAXII.v
.................................................\......\tiny16_MAXII.vwf
.................................................\......\UFM.bsf
.................................................\......\UFM.inc
.................................................\......\UFM.v
.................................................\......\UFM_bb.v
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