FPGA-based VGA controller design. External support ordinary VGA interface, to 600 × 480 resolution and scan rate of 60Hz as an example. Internal support NIOSII soft-core interface.

VGA_control_verilogHDL
......................\software
......................\........\lancelot
......................\........\........\.cdtbuild
......................\........\........\.cdtproject
......................\........\........\.project
......................\........\........\application.stf
......................\........\........\debug
......................\........\........\lancelot.c
......................\........\........\lancelot.h
......................\........\........\readme.txt
......................\........\lancelot_syslib
......................\........\...............\.cdtbuild
......................\........\...............\.cdtproject
......................\........\...............\.project
......................\........\...............\readme.c
......................\........\...............\system.stf
......................\User_Manual.pdf
......................\vga.ver

......................\.......\class.ptf
......................\.......\inc
......................\.......\...\lancelot_vga_regs.h
......................\.......\lancelot_dpram_256x24.vhd
......................\.......\lancelot_dpram_256x32.vhd
......................\.......\lancelot_fifo.vhd
......................\.......\lancelot_vga.vhd
......................\.......\mk_lancelot_vga.pl

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