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FPGA-CPLD_DesignTool(8-9-10)

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 9.23mb
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Introduction - If you have any usage issues, please Google them yourself
FPGA-CPLD_DesignTool (8-9-10) requested the source code to their peers in need Friends Download
Packet file list
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Example-10-1
............\I2C
............\...\modelsim
............\...\........\0719.wlf
............\...\........\comp.wlf
............\...\........\format.do
............\...\........\I2C.cr.mti
............\...\........\I2C.mpf
............\...\........\I2C_mapped.cr.mti
............\...\........\I2C_mapped.mpf
............\...\........\rtl_ok.wlf
............\...\........\simprim
............\...\........\.......\dcm_clock_divide_by_2
............\...\........\.......\.....................\dcm_clock_divide_by_2_v.asm
............\...\........\.......\.....................\dcm_clock_divide_by_2_v.dat
............\...\........\.......\.....................\_primary.dat
............\...\........\.......\dcm_clock_lost
............\...\........\.......\..............\dcm_clock_lost_v.asm
............\...\........\.......\..............\dcm_clock_lost_v.dat
............\...\........\.......\..............\_primary.dat
............\...\........\.......\dcm_maximum_period_check
............\...\........\.......\........................\dcm_maximum_period_check_v.asm
............\...\........\.......\........................\dcm_maximum_period_check_v.dat
............\...\........\.......\........................\_primary.dat
............\...\........\.......\vcomponents
............\...\........\.......\...........\_primary.dat
............\...\........\.......\...........\_vhdl.asm
............\...\........\.......\vpackage
............\...\........\.......\........\body.asm
............\...\........\.......\........\body.dat
............\...\........\.......\........\_primary.dat
............\...\........\.......\........\_vhdl.asm
............\...\........\.......\x_and16
............\...\........\.......\.......\x_and16_v.asm
............\...\........\.......\.......\x_and16_v.dat
............\...\........\.......\.......\_primary.dat
............\...\........\.......\x_and2
............\...\........\.......\......\x_and2_v.asm
............\...\........\.......\......\x_and2_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and3
............\...\........\.......\......\x_and3_v.asm
............\...\........\.......\......\x_and3_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and32
............\...\........\.......\.......\x_and32_v.asm
............\...\........\.......\.......\x_and32_v.dat
............\...\........\.......\.......\_primary.dat
............\...\........\.......\x_and4
............\...\........\.......\......\x_and4_v.asm
............\...\........\.......\......\x_and4_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and5
............\...\........\.......\......\x_and5_v.asm
............\...\........\.......\......\x_and5_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and6
............\...\........\.......\......\x_and6_v.asm
............\...\........\.......\......\x_and6_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and7
............\...\........\.......\......\x_and7_v.asm
............\...\........\.......\......\x_and7_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and8
............\...\........\.......\......\x_and8_v.asm
............\...\........\.......\......\x_and8_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_and9
............\...\........\.......\......\x_and9_v.asm
............\...\........\.......\......\x_and9_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_bpad
............\...\........\.......\......\x_bpad_v.asm
............\...\........\.......\......\x_bpad_v.dat
............\...\........\.......\......\_primary.dat
............\...\........\.......\x_buf
............\...\........\.......\.....\x_buf_v.asm
............\...\........\.......\.....\x_buf_v.dat
............\...\........\.......\.....\_prima
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