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vhdl_led

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 356kb
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  • Author :赵****
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Introduction - If you have any usage issues, please Google them yourself
seven of the digital control experiments (including two experimental), the digital control of a Test : Dynamic scanning approach to the eight digital control "at the same time" show 0-7,
Packet file list
(Preview for download)
7段数码管
.........\seg70
.........\.....\cmp_state.ini
.........\.....\db
.........\.....\..\seg70.asm.qmsg
.........\.....\..\seg70.asm_labs.ddb
.........\.....\..\seg70.cbx.xml
.........\.....\..\seg70.cmp.cdb
.........\.....\..\seg70.cmp.hdb
.........\.....\..\seg70.cmp.kpt
.........\.....\..\seg70.cmp.logdb
.........\.....\..\seg70.cmp.rdb
.........\.....\..\seg70.cmp.tdb
.........\.....\..\seg70.cmp0.ddb
.........\.....\..\seg70.dbp
.........\.....\..\seg70.db_info
.........\.....\..\seg70.eco.cdb
.........\.....\..\seg70.fit.qmsg
.........\.....\..\seg70.hier_info
.........\.....\..\seg70.hif
.........\.....\..\seg70.map.cdb
.........\.....\..\seg70.map.hdb
.........\.....\..\seg70.map.logdb
.........\.....\..\seg70.map.qmsg
.........\.....\..\seg70.pre_map.cdb
.........\.....\..\seg70.pre_map.hdb
.........\.....\..\seg70.psp
.........\.....\..\seg70.rtlv.hdb
.........\.....\..\seg70.rtlv_sg.cdb
.........\.....\..\seg70.rtlv_sg_swap.cdb
.........\.....\..\seg70.sgdiff.cdb
.........\.....\..\seg70.sgdiff.hdb
.........\.....\..\seg70.signalprobe.cdb
.........\.....\..\seg70.sld_design_entry.sci
.........\.....\..\seg70.sld_design_entry_dsc.sci
.........\.....\..\seg70.syn_hier_info
.........\.....\..\seg70.tan.qmsg
.........\.....\seg70.asm.rpt
.........\.....\seg70.cdf
.........\.....\seg70.done
.........\.....\seg70.fit.eqn
.........\.....\seg70.fit.rpt
.........\.....\seg70.fit.smsg
.........\.....\seg70.fit.summary
.........\.....\seg70.flow.rpt
.........\.....\seg70.map.eqn
.........\.....\seg70.map.rpt
.........\.....\seg70.map.summary
.........\.....\seg70.pin
.........\.....\seg70.pof
.........\.....\seg70.qpf
.........\.....\seg70.qsf
.........\.....\seg70.qws
.........\.....\seg70.tan.rpt
.........\.....\seg70.tan.summary
.........\.....\seg70.vhd
.........\.....\seg70_assignment_defaults.qdf
.........\.....\sopc_builder_debug_log.txt
.........\seg73
.........\.....\cmp_state.ini
.........\.....\db
.........\.....\..\seg73.asm.qmsg
.........\.....\..\seg73.cbx.xml
.........\.....\..\seg73.cmp.cdb
.........\.....\..\seg73.cmp.hdb
.........\.....\..\seg73.cmp.rdb
.........\.....\..\seg73.cmp.tdb
.........\.....\..\seg73.cmp0.ddb
.........\.....\..\seg73.db_info
.........\.....\..\seg73.eco.cdb
.........\.....\..\seg73.fit.qmsg
.........\.....\..\seg73.hier_info
.........\.....\..\seg73.hif
.........\.....\..\seg73.map.cdb
.........\.....\..\seg73.map.hdb
.........\.....\..\seg73.map.qmsg
.........\.....\..\seg73.pre_map.cdb
.........\.....\..\seg73.pre_map.hdb
.........\.....\..\seg73.psp
.........\.....\..\seg73.rtlv.hdb
.........\.....\..\seg73.rtlv_sg.cdb
.........\.....\..\seg73.rtlv_sg_swap.cdb
.........\.....\..\seg73.sgdiff.cdb
.........\.....\..\seg73.sgdiff.hdb
.........\.....\..\seg73.signalprobe.cdb
.........\.....\..\seg73.sld_design_entry.sci
.........\.....\..\seg73.sld_design_entry_dsc.sci
.........\.....\..\seg73.syn_hier_info
.........\.....\..\seg73.tan.qmsg
.........\.....\seg73.asm.rpt
.........\.....\seg73.cdf
.........\.....\seg73.done
.........\.....\seg73.fit.eqn
.........\.....\seg73.fit.rpt
.........\.....\seg73.fit.summary
.........\.....\seg73.flow.rpt
.........\.....\seg73.map.eqn
.........\.....\seg73.map.rpt
.........\.....\seg73.map.summary
.........\.....\seg73.pin
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