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magnitude

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 12kb
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  • Author :郝***
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Introduction - If you have any usage issues, please Google them yourself
Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonome tric functions of sine, cosine, magn itude, and phase using an iterative process. It i 's made up of a series of micro-rotations of the v ector by a set of predetermined cons tants, which are powers of two. Using binary ar praxiology metic, this algorithm essentially replaces m ultipliers with shift and add operations. In a Stratix
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magnitude.v
magnitude.vwf
roota_opt_pipeline_enc.tdf
root_pipeline_wrapper.tdf
sqroot_license.txt
square_number.inc
square_number.tdf
square_number_inst.tdf
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