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i2cjiekouchengxu

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 2.26mb
  • Downloaded :0次
  • Author :孙****
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
IIC interface procedures, Xia Wen is the book series "verilog Digital System Design Guide," the IIC the source, very user-friendly
Packet file list
(Preview for download)
i2c
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...\.....\CVS
...\.....\...\Entries
...\.....\...\Repository
...\.....\...\Root
...\.....\verilog
...\.....\.......\CVS
...\.....\.......\...\Entries
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...\.....\.......\i2c_slave_model.v
...\.....\.......\i2c_slave_model.v.bak
...\.....\.......\spi_slave_model.v
...\.....\.......\spi_slave_model.v.bak
...\.....\.......\tst_bench_top.v
...\.....\.......\tst_bench_top.v.bak
...\.....\.......\wb_master_model.v
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...\CVS
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...\...\...\I2C_specs.doc
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...\...\.......\i2c_master_bit_ctrl.v
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...\...\.......\i2c_master_byte_ctrl.v
...\...\.......\i2c_master_byte_ctrl.v.bak
...\...\.......\i2c_master_defines.v
...\...\.......\i2c_master_top.v
...\...\.......\i2c_master_top.v.bak
...\...\.......\timescale.v
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...\...\....\I2C.VHD
...\...\....\i2c_master_bit_ctrl.vhd
...\...\....\i2c_master_byte_ctrl.vhd
...\...\....\i2c_master_top.vhd
...\...\....\readme
...\...\....\tst_ds1621.vhd
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...\...\...........\CVS
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...\...\...........\...\ncverilog.log
...\...\...........\...\run
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...\...\....\@m@a@x@i@i_@p@r@i@m_@d@f@f@e
...\...\....\............................\verilog.asm
...\...\....\............................\_primary.dat
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