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VHDL_block

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 131kb
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This is the module on the VHDL source code, welcomed the U.S. download.
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调用底层VHDL模块
................\frequency_counter_2(successful)(top-down design)
................\................................................\cmp_state.ini
................\................................................\counter_10.vhd
................\................................................\counter_ctrl.vhd
................\................................................\db
................\................................................\..\add_sub_1sh.tdf
................\................................................\..\frequency_counter_2.cbx.xml
................\................................................\..\frequency_counter_2.cmp.rdb
................\................................................\..\frequency_counter_2.db_info
................\................................................\..\frequency_counter_2.eco.cdb
................\................................................\..\frequency_counter_2.eds_overflow
................\................................................\..\frequency_counter_2.fnsim.cdb
................\................................................\..\frequency_counter_2.fnsim.hdb
................\................................................\..\frequency_counter_2.hier_info
................\................................................\..\frequency_counter_2.hif
................\................................................\..\frequency_counter_2.map.cdb
................\................................................\..\frequency_counter_2.map.hdb
................\................................................\..\frequency_counter_2.map.logdb
................\................................................\..\frequency_counter_2.map.qmsg
................\................................................\..\frequency_counter_2.pre_map.cdb
................\................................................\..\frequency_counter_2.pre_map.hdb
................\................................................\..\frequency_counter_2.psp
................\................................................\..\frequency_counter_2.rpp.qmsg
................\................................................\..\frequency_counter_2.rtlv.hdb
................\................................................\..\frequency_counter_2.rtlv_sg.cdb
................\................................................\..\frequency_counter_2.rtlv_sg_swap.cdb
................\................................................\..\frequency_counter_2.sgate.rvd
................\................................................\..\frequency_counter_2.sgdiff.cdb
................\................................................\..\frequency_counter_2.sgdiff.hdb
................\................................................\..\frequency_counter_2.sim.hdb
................\................................................\..\frequency_counter_2.sim.qmsg
................\................................................\..\frequency_counter_2.sim.rdb
................\................................................\..\frequency_counter_2.sim.vwf
................\................................................\..\frequency_counter_2.sld_design_entry.sci
................\................................................\..\frequency_counter_2.sld_design_entry_dsc.sci
................\................................................\..\frequency_counter_2.syn_hier_info
................\................................................\..\frequency_counter_2_cmp.qrpt
................\................................................\..\frequency_counter_2_sim.qrpt
................\................................................\frequency_counter_2.done
................\................................................\frequency_counter_2.flow.rpt
................\................................................\frequency_counter_2.map.eqn
................\................................................\frequency_counter_2.map.rpt
................\............................................
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