This source for the linear phase filter VHDL source code and design experiences, theoretical analysis and summary of the combination of engineering practice, has a great reference value

17阶FIR滤波器VHDL代码及说明文档
...............................\EDA课程设计报告.doc
...............................\firOK
...............................\.....\add121313.bsf
...............................\.....\add121313.vhd
...............................\.....\add121414.bsf
...............................\.....\add121414.vhd
...............................\.....\add121616.bsf
...............................\.....\add121616.vhd
...............................\.....\add141616.bsf
...............................\.....\add141616.vhd
...............................\.....\add888.bsf
...............................\.....\add888.vhd
...............................\.....\add889.bsf
...............................\.....\add889.vhd
...............................\.....\cmp_state.ini
...............................\.....\db
...............................\.....\..\fir-sim.vwf
...............................\.....\..\fir.cbx.xml
...............................\.....\..\fir.cmp.logdb
...............................\.....\..\fir.cmp.rdb
...............................\.....\..\fir.dbp
...............................\.....\..\fir.db_info
...............................\.....\..\fir.eco.cdb
...............................\.....\..\fir.fit.qmsg
...............................\.....\..\fir.hier_info
...............................\.....\..\fir.hif
...............................\.....\..\fir.map.cdb
...............................\.....\..\fir.map.hdb
...............................\.....\..\fir.map.logdb
...............................\.....\..\fir.map.qmsg
...............................\.....\..\fir.pre_map.cdb
...............................\.....\..\fir.pre_map.hdb
...............................\.....\..\fir.psp
...............................\.....\..\fir.rtlv.hdb
...............................\.....\..\fir.rtlv_sg.cdb
...............................\.....\..\fir.rtlv_sg_swap.cdb
...............................\.....\..\fir.sgdiff.cdb
...............................\.....\..\fir.sgdiff.hdb
...............................\.....\..\fir.sld_design_entry.sci
...............................\.....\..\fir.sld_design_entry_dsc.sci
...............................\.....\..\fir.syn_hier_info
...............................\.....\..\fir_cmp.qrpt
...............................\.....\..\fir_hier_info
...............................\.....\..\fir_sim.qrpt
...............................\.....\..\fir_syn_hier_info
...............................\.....\..\wed.zsf
...............................\.....\dff15.bsf
...............................\.....\dff15.vhd
...............................\.....\dff8.bsf
...............................\.....\dff8.vhd
...............................\.....\dff89.bsf
...............................\.....\dff89.vhd
...............................\.....\fir.asm.rpt
...............................\.....\fir.bdf
...............................\.....\fir.done
...............................\.....\fir.fit.eqn
...............................\.....\fir.fit.rpt
...............................\.....\fir.flow.rpt
...............................\.....\fir.map.eqn
...............................\.....\fir.map.rpt
...............................\.....\fir.map.summary
...............................\.....\fir.pin
...............................\.....\fir.pof
...............................\.....\fir.qpf
...............................\.....\fir.qsf
...............................\.....\fir.qws
...............................\.....\fir.sim.rpt
...............................\.....\fir.sof
...............................\.....\fir.tan.rpt
...............................\.....\fir.tan.summary
...............................\.....\fir.vwf
...............................\.....\fir_assignment_defaults.qdf
...............................\.....\mult12.bsf
...............................\.....\mult12.vhd
...............................\.....\mult13.bsf
...............................\.....\mult13.vhd
...............................\.....\mult14.bsf
...............................\.....\mult14.vhd
...............................\.....\mult1

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