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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 254kb
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  • Author :Sean ******
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Introduction - If you have any usage issues, please Google them yourself
Examples of CPLD procedures 2, EPM7064 chip, PC104 expansion cards application
Packet file list
(Preview for download)
V2.1_OK
.......\7128
.......\....\7064.asm.rpt
.......\....\7064.cdf
.......\....\7064.done
.......\....\7064.fit.eqn
.......\....\7064.fit.rpt
.......\....\7064.fit.summary
.......\....\7064.flow.rpt
.......\....\7064.map.eqn
.......\....\7064.map.rpt
.......\....\7064.map.summary
.......\....\7064.pin
.......\....\7064.pof
.......\....\7064.qpf
.......\....\7064.qsf
.......\....\7064.qws
.......\....\7064.tan.rpt
.......\....\7064.tan.summary
.......\....\cmp_state.ini
.......\....\cpld_7064.vhd
.......\....\db
.......\....\..\7064.asm.qmsg
.......\....\..\7064.cmp.cdb
.......\....\..\7064.cmp.ddb
.......\....\..\7064.cmp.hdb
.......\....\..\7064.cmp.rdb
.......\....\..\7064.cmp.tdb
.......\....\..\7064.cmp0.ddb
.......\....\..\7064.db_info
.......\....\..\7064.eco.cdb
.......\....\..\7064.fit.qmsg
.......\....\..\7064.hier_info
.......\....\..\7064.hif
.......\....\..\7064.map.cdb
.......\....\..\7064.map.hdb
.......\....\..\7064.map.qmsg
.......\....\..\7064.pre_map.cdb
.......\....\..\7064.pre_map.hdb
.......\....\..\7064.psp
.......\....\..\7064.rtlv.hdb
.......\....\..\7064.rtlv_sg.cdb
.......\....\..\7064.rtlv_sg_swap.cdb
.......\....\..\7064.sgdiff.cdb
.......\....\..\7064.sgdiff.hdb
.......\....\..\7064.sld_design_entry.sci
.......\....\..\7064.sld_design_entry_dsc.sci
.......\....\..\7064.syn_hier_info
.......\....\..\7064.tan.qmsg
.......\....\..\7064_cmp.qrpt
.......\....\..\add_sub_pnh.tdf
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