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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 37kb
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  • Author :wan****
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Introduction - If you have any usage issues, please Google them yourself
FPGA source code in the FLASH configuration control, VHDL and Verilog
Packet file list
(Preview for download)
ConfigurationController_v1
..........................\source_verilog
..........................\..............\config_controller.v
..........................\..............\config_control_signals.v
..........................\..............\config_state_machine.v
..........................\..............\header.v
..........................\..............\readme_verilog_v1.doc
..........................\source_vhdl
..........................\...........\config_controller.vhd
..........................\...........\config_control_signal_fpp.vhd
..........................\...........\config_control_signal_fpp_c.vhd
..........................\...........\config_control_signal_ppa.vhd
..........................\...........\config_control_signal_ps.vhd
..........................\...........\config_state_machine.vhd
..........................\...........\readme_vhdl_v1.doc
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