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VGA_example

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 941kb
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  • Author :张***
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Introduction - If you have any usage issues, please Google them yourself
FPGA/cpld control display VHDL source code, there are test procedures
Packet file list
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VGA_example
...........\vgainterface
...........\............\cmp_state.ini
...........\............\code.hex
...........\............\db
...........\............\..\altsyncram_fiq.tdf
...........\............\..\altsyncram_puq.tdf
...........\............\..\altsyncram_qcr.tdf
...........\............\..\altsyncram_s1r.tdf
...........\............\..\cntr_ea7.tdf
...........\............\..\cntr_vu7.tdf
...........\............\..\mux_rab.tdf
...........\............\..\vgainterface.asm.qmsg
...........\............\..\vgainterface.cmp.cdb
...........\............\..\vgainterface.cmp.ddb
...........\............\..\vgainterface.cmp.hdb
...........\............\..\vgainterface.cmp.rdb
...........\............\..\vgainterface.cmp.tdb
...........\............\..\vgainterface.dat_manager.dat
...........\............\..\vgainterface.db_info
...........\............\..\vgainterface.fit.qmsg
...........\............\..\vgainterface.hier_info
...........\............\..\vgainterface.hif
...........\............\..\vgainterface.icc
...........\............\..\vgainterface.map.cdb
...........\............\..\vgainterface.map.hdb
...........\............\..\vgainterface.map.qmsg
...........\............\..\vgainterface.pre_map.hdb
...........\............\..\vgainterface.project.hdb
...........\............\..\vgainterface.rtlv.hdb
...........\............\..\vgainterface.rtlv_sg.cdb
...........\............\..\vgainterface.rtlv_sg_swap.cdb
...........\............\..\vgainterface.sgdiff.cdb
...........\............\..\vgainterface.sgdiff.hdb
...........\............\..\vgainterface.signalprobe.cdb
...........\............\..\vgainterface.sim.hdb
...........\............\..\vgainterface.sim.qmsg
...........\............\..\vgainterface.sim.rdb
...........\............\..\vgainterface.sim.vwf
...........\............\..\vgainterface.sld_design_entry.sci
...........\............\..\vgainterface.sld_design_entry_dsc.sci
...........\............\..\vgainterface.syn_hier_info
...........\............\..\vgainterface.tan.qmsg
...........\............\..\vgainterface_cmp.qrpt
...........\............\..\vgainterface_sim.qrpt
...........\............\serv_req_info.txt
...........\............\sim.cfg
...........\............\tsinghua.cmp
...........\............\tsinghua.mif
...........\............\tsinghua.vhd
...........\............\undo_redo.txt
...........\............\vgainterface.asm.rpt
...........\............\vgainterface.cdf
...........\............\vgainterface.done
...........\............\vgainterface.fit.eqn
...........\............\vgainterface.fit.rpt
...........\............\vgainterface.fit.summary
...........\............\vgainterface.flow.rpt
...........\............\vgainterface.map.eqn
...........\............\vgainterface.map.rpt
...........\............\vgainterface.map.summary
...........\............\vgainterface.mif
...........\............\vgainterface.pin
...........\............\vgainterface.pof
...........\............\vgainterface.qpf
...........\............\vgainterface.qsf
...........\............\vgainterface.qws
...........\............\vgainterface.sim.rpt
...........\............\vgainterface.sof
...........\............\vgainterface.tan.rpt
...........\............\vgainterface.tan.summary
...........\............\vgainterface.vhd
...........\............\vgainterface.vwf
...........\VGA_test1
...........\.........\vgainterface
...........\.........\............\Chain1.cdf
...........\.........\............\cmp_state.ini
...........\.........\............\db
...........\.........\............\..\altsyncram_42r.tdf
...........\.........\............\..\altsyncram_fiq.tdf
...........\.........\............\..\altsyncram_puq.tdf
...........\.........\............\..\altsyncram_qcr.tdf
...........\.........\............\..\altsyncram_s1r.tdf
...........\.........\............\..\cntr_ea7.tdf
...........\.........\............\..\cntr_vu7.tdf
...........\.........\............\..\mux_gcb.tdf
...........\.........\............\..\mux_rab.tdf
...........\.........\............\..\vgainterface.asm.qmsg
..
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