Pie edcode coding program design, and matlab simulation VHDL hardware implementation

pie_code
........\auk_dspip_avalon_streaming_controller.vhd
........\auk_dspip_avalon_streaming_sink.vhd
........\auk_dspip_avalon_streaming_source.vhd
........\auk_dspip_delay.vhd
........\auk_dspip_lib_pkg.vhd
........\auk_dspip_math_pkg.vhd
........\auk_dspip_roundsat.vhd
........\board
........\.....\ibis
........\.....\....\pie_code.ibs
........\db
........\..\altsyncram_2lf1.tdf
........\..\altsyncram_8lf1.tdf
........\..\a_dpfifo_i551.tdf
........\..\a_dpfifo_l551.tdf
........\..\cntr_bjb.tdf
........\..\cntr_cjb.tdf
........\..\cntr_oj7.tdf
........\..\pie_code.asm.qmsg
........\..\pie_code.asm_labs.ddb
........\..\pie_code.cbx.xml
........\..\pie_code.cmp.bpm
........\..\pie_code.cmp.cdb
........\..\pie_code.cmp.ecobp
........\..\pie_code.cmp.hdb
........\..\pie_code.cmp.logdb
........\..\pie_code.cmp.rdb
........\..\pie_code.cmp.tdb
........\..\pie_code.cmp0.ddb
........\..\pie_code.cmp2.ddb
........\..\pie_code.cmp_bb.cdb
........\..\pie_code.cmp_bb.hdb
........\..\pie_code.cmp_bb.logdb
........\..\pie_code.cmp_bb.rcf
........\..\pie_code.dbp
........\..\pie_code.db_info
........\..\pie_code.eco.cdb
........\..\pie_code.eda.qmsg
........\..\pie_code.eds_overflow
........\..\pie_code.fit.qmsg
........\..\pie_code.hier_info
........\..\pie_code.hif
........\..\pie_code.map.bpm
........\..\pie_code.map.cdb
........\..\pie_code.map.ecobp
........\..\pie_code.map.hdb
........\..\pie_code.map.logdb
........\..\pie_code.map.qmsg
........\..\pie_code.map_bb.cdb
........\..\pie_code.map_bb.hdb
........\..\pie_code.map_bb.logdb
........\..\pie_code.merge.qmsg
........\..\pie_code.pre_map.cdb
........\..\pie_code.pre_map.hdb
........\..\pie_code.psp
........\..\pie_code.pss
........\..\pie_code.rtlv.hdb
........\..\pie_code.rtlv_sg.cdb
........\..\pie_code.rtlv_sg_swap.cdb
........\..\pie_code.sgdiff.cdb
........\..\pie_code.sgdiff.hdb
........\..\pie_code.signalprobe.cdb
........\..\pie_code.sim.cvwf
........\..\pie_code.sim.hdb
........\..\pie_code.sim.qmsg
........\..\pie_code.sim.rdb
........\..\pie_code.sld_design_entry.sci
........\..\pie_code.sld_design_entry_dsc.sci
........\..\pie_code.smp_dump.txt
........\..\pie_code.syn_hier_info
........\..\pie_code.tan.qmsg
........\..\scfifo_ded1.tdf
........\..\scfifo_ged1.tdf
........\..\wed.wsf
........\fff.bsf
........\fff.cmp
........\fff.html
........\fff.vec
........\fff.vhd
........\fff.xml
........\fff_coef_int.txt
........\fff_constraints.tcl
........\fff_mlab.m
........\fff_model.m
........\fff_msim.tcl
........\fff_nativelink.tcl
........\fff_new.vhd
........\fff_param.txt
........\fff_silent_param.txt
........\fff_st.v
........\fff_st_wr.v
........\fir_input.txt
........\my_read_tbl_5M_psk.asv
........\my_read_tbl_5M_psk.m
........\M_generate.bsf
........\M_generate.vhd
........\pie_800Kfs_40KTari_80Kfc_dB.fig
........\pie_800Kfs_40KTari_80Kfc_F.fig
........\pie_800Kfs_40KTari_80Kfc_T.fig

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