This is made good use of Verilog HDL 1 2 election data selector can be used directly without password

and2_gate
.........\and2_gate.asm.rpt
.........\and2_gate.done
.........\and2_gate.dpf
.........\and2_gate.fit.rpt
.........\and2_gate.fit.smsg
.........\and2_gate.fit.summary
.........\and2_gate.flow.rpt
.........\and2_gate.map.rpt
.........\and2_gate.map.summary
.........\and2_gate.mif_update.rpt
.........\and2_gate.pin
.........\and2_gate.pof
.........\and2_gate.qpf
.........\and2_gate.qsf
.........\and2_gate.qws
.........\and2_gate.sim.rpt
.........\and2_gate.sof
.........\and2_gate.tan.rpt
.........\and2_gate.tan.summary
.........\and2_gate.v
.........\and2_gate.vwf
.........\db
.........\..\and2_gate.asm.qmsg
.........\..\and2_gate.cbx.xml
.........\..\and2_gate.cmp.bpm
.........\..\and2_gate.cmp.cdb
.........\..\and2_gate.cmp.ecobp
.........\..\and2_gate.cmp.hdb
.........\..\and2_gate.cmp.logdb
.........\..\and2_gate.cmp.rdb
.........\..\and2_gate.cmp.tdb
.........\..\and2_gate.cmp0.ddb
.........\..\and2_gate.cmp_bb.cdb
.........\..\and2_gate.cmp_bb.hdb
.........\..\and2_gate.cmp_bb.logdb
.........\..\and2_gate.cmp_bb.rcf
.........\..\and2_gate.dbp
.........\..\and2_gate.db_info
.........\..\and2_gate.eco.cdb
.........\..\and2_gate.eds_overflow
.........\..\and2_gate.fit.qmsg
.........\..\and2_gate.hier_info
.........\..\and2_gate.hif
.........\..\and2_gate.map.bpm
.........\..\and2_gate.map.cdb
.........\..\and2_gate.map.ecobp
.........\..\and2_gate.map.hdb
.........\..\and2_gate.map.logdb
.........\..\and2_gate.map.qmsg
.........\..\and2_gate.map_bb.cdb
.........\..\and2_gate.map_bb.hdb
.........\..\and2_gate.map_bb.logdb
.........\..\and2_gate.mif_update.qmsg
.........\..\and2_gate.pre_map.cdb
.........\..\and2_gate.pre_map.hdb
.........\..\and2_gate.psp
.........\..\and2_gate.pss
.........\..\and2_gate.rtlv.hdb
.........\..\and2_gate.rtlv_sg.cdb
.........\..\and2_gate.rtlv_sg_swap.cdb
.........\..\and2_gate.sgdiff.cdb
.........\..\and2_gate.sgdiff.hdb
.........\..\and2_gate.signalprobe.cdb
.........\..\and2_gate.sim.cvwf
.........\..\and2_gate.sim.hdb
.........\..\and2_gate.sim.qmsg
.........\..\and2_gate.sim.rdb
.........\..\and2_gate.sld_design_entry.sci
.........\..\and2_gate.sld_design_entry_dsc.sci
.........\..\and2_gate.syn_hier_info
.........\..\and2_gate.tan.qmsg
.........\..\and2_gate.tis_db_list.ddb
.........\..\prev_cmp_and2_gate.asm.qmsg
.........\..\prev_cmp_and2_gate.fit.qmsg
.........\..\prev_cmp_and2_gate.map.qmsg
.........\..\prev_cmp_and2_gate.mif_update.qmsg
.........\..\prev_cmp_and2_gate.qmsg
.........\..\prev_cmp_and2_gate.sim.qmsg
.........\..\prev_cmp_and2_gate.tan.qmsg
.........\..\wed.wsf

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