Using FPGA to realize the camera to capture and collection, can refer to

Digital_Camera
..............\Camera_Control_Exe
..............\..................\camera_control.exe
..............\..................\data_out.bin
..............\..................\DLPORTIO.dll
..............\..................\uniio.dll
..............\camera_control_Source
..............\.....................\Bitmap.cpp
..............\.....................\bitmap.h
..............\.....................\camera_control.cpp
..............\.....................\camera_control.dsp
..............\.....................\camera_control.dsw
..............\.....................\camera_control.ncb
..............\.....................\camera_control.opt
..............\.....................\camera_control.plg
..............\.....................\Debug
..............\.....................\DLPORTIO.dll
..............\.....................\hardware_interface.cpp
..............\.....................\hardware_interface.h
..............\.....................\icon1.ico
..............\.....................\image_manip.cpp
..............\.....................\image_manip.h
..............\.....................\mystructs.h
..............\.....................\Needed_dlls.txt
..............\.....................\Release
..............\.....................\resource.h
..............\.....................\Script1.aps
..............\.....................\Script1.rc
..............\.....................\string_buffer.cpp
..............\.....................\string_buffer.h
..............\.....................\uniio.dll
..............\.....................\Xsport.cpp
..............\VHDL_Source
..............\...........\asyn_fifo_block.vhd
..............\...........\asyn_fifo_distrib.edn
..............\...........\asyn_fifo_distrib.vhd
..............\...........\asyn_fifo_distrib_64.edn
..............\...........\asyn_fifo_distrib_64.vhd
..............\...........\blank.ucf
..............\...........\block_ram_2kx16.edn
..............\...........\block_ram_2kx16.vhd
..............\...........\clockdivider.vhd
..............\...........\clock_generation.vhd
..............\...........\comp_pckgs.vhd
..............\...........\digital_camera.ucf
..............\...........\digital_camera.vhd
..............\...........\digital_camera_tb.vhd
..............\...........\exemplar.his
..............\...........\exemplar.log
..............\...........\I2C.vhd
..............\...........\KAC_data.vhd
..............\...........\KAC_i2c.vhd
..............\...........\LEDDecoder.vhd
..............\...........\master_control_signal_generator.vhd
..............\...........\ms_delay.vhd
..............\...........\one_shot.vhd
..............\...........\pp_upload.vhd
..............\...........\pullup.vhd
..............\...........\ram_control.vhd
..............\...........\sdramcntl.vhd
..............\...........\signal_debounce.vhd

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