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sc2_1.4beta.tar

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 4.23mb
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  • Author :Zexian******
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Introduction - If you have any usage issues, please Google them yourself
C language based on VHDL modeling data-stream processing tool, suitable for algorithm C, prepared to do to speed up processing.
Packet file list
(Preview for download)
sc2_1.4beta
...........\.streamscrc
...........\.streamscrc_bash
...........\apps
...........\....\arch
...........\....\....\Basic.def
...........\....\....\Firebird.def
...........\....\....\Firebird_mem.def
...........\....\....\Memory_types.def
...........\....\array
...........\....\.....\array.sc
...........\....\.....\input_data.dat
...........\....\.....\Makefile
...........\....\array_bram
...........\....\..........\array_bram.sc
...........\....\..........\input_data.dat
...........\....\..........\Makefile
...........\....\array_range
...........\....\...........\array_range.sc
...........\....\...........\input_data.dat
...........\....\...........\Makefile
...........\....\array_sig
...........\....\.........\array_sig.sc
...........\....\.........\input_data.dat
...........\....\.........\Makefile
...........\....\bram1
...........\....\.....\bram1.sc
...........\....\.....\gen_data.c
...........\....\.....\Makefile
...........\....\DES
...........\....\...\datain.dat
...........\....\...\DES.sc
...........\....\...\Makefile
...........\....\fastfold
...........\....\........\datain1.dat
...........\....\........\fastfold.sc
...........\....\........\Makefile
...........\....\kmeans
...........\....\......\km.h
...........\....\......\kmeans.fig
...........\....\......\kmeans.sc
...........\....\......\kmp.h
...........\....\......\Makefile
...........\....\......\mti_vcom.do
...........\....\......\sim
...........\....\......\...\centers.dat
...........\....\......\...\host_kmeans_arch.vhd
...........\....\......\...\pixels.dat
...........\....\......\...\system_cfg.vhd
...........\....\Makefile
...........\....\mem1
...........\....\....\gen_data.c
...........\....\....\Makefile
...........\....\....\mem1.sc
...........\....\....\README
...........\....\mem2
...........\....\....\gen_data.c
...........\....\....\Makefile
...........\....\....\mem2.sc
...........\....\....\mti_vcom.do
...........\....\....\README
...........\....\....\sim
...........\....\....\...\host_mem2_arch.vhd
...........\....\....\...\mem_init.dat
...........\....\....\...\system_cfg.vhd
...........\....\....\system_cfg.vhd
...........\....\mem3
...........\....\....\gen_data.c
...........\....\....\Makefile
...........\....\....\mem3.sc
...........\....\mult1
...........\....\.....\datain.dat
...........\....\.....\Makefile
...........\....\.....\mult1.sc
...........\....\mult2
...........\....\.....\datain.dat
...........\....\.....\Makefile
...........\....\.....\mult2.sc
...........\....\ppf
...........\....\...\datain.dat
...........\....\...\Makefile
...........\....\...\mti_vcom.do
...........\....\...\ppf.fig
...........\....\...\ppf.sc
...........\....\...\sim
...........\....\...\...\datain.dat
...........\....\...\...\host_ppf_arch.vhd
...........\....\...\...\system_cfg.vhd
...........\....\ppf1
...........\....\....\datain.dat
...........\....\....\Makefile
...........\....\....\mem.c
...........\....\....\ppf1.sc
...........\....\ppf2
...........\....\....\datain.dat
...........\....\....\Makefile
...........\....\....\ppf2.sc
...........\....\sig2
...........\....\....\datain.dat
...........\....\....\Makefile
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