FFT prepared using VHDL code, it is wide, it is powerful.

fft_test
........\.recordref
........\ad_ram.mif
........\AutoConstraint_fft_test.sdc
........\compxlib.cfg
........\device_usage_statistics.html
........\fft.asy
........\fft.ngc
........\fft.sym
........\fft.v
........\fft.veo
........\fft.vhd
........\fft.vho
........\fft.xco
........\fft_flist.txt
........\fft_test.fse
........\fft_test.htm
........\fft_test.ise
........\fft_test.ise_created
........\fft_test.map
........\fft_test.ncf
........\fft_test.ntrc_log
........\fft_test.prj
........\fft_test.sap
........\fft_test.sdc
........\fft_test.srd
........\fft_test.srm
........\fft_test.srs
........\fft_test.tap
........\fft_test.ut
........\fft_test.v
........\fft_test_compile.tcl
........\fft_test_core
........\.............\fft_test_core.cgp
........\.............\ram.edn
........\.............\ram.mif
........\.............\ram.vhd
........\.............\ram.vho
........\.............\ram.xco
........\.............\ram_flist.txt
........\.............\ram_readme.txt
........\.............\tmp
........\.............\...\_cg
........\.............\transcript
........\fft_test_map.tcl
........\fft_test_summary.html
........\fft_wave.ant
........\fft_wave.fdo
........\fft_wave.jhd
........\fft_wave.tbw
........\fft_wave.tfw
........\fft_wave.udo
........\fft_wave.xwv
........\fft_wave_bencher.prj
........\layer0.sro
........\layer0.tlg
........\layer1.info
........\layer1.sro
........\layer1.tlg
........\modelsim.ini
........\ram.edn
........\ram.mif
........\ram.ngo
........\ram.vhd
........\ram.vho
........\ram.xco
........\ram_flist.txt
........\ram_readme.txt
........\results.txt
........\rpt_fft_test.areasrr
........\rpt_fft_test_areasrr.htm
........\sin_tab.cgf
........\sin_tab_init.coe
........\stderr.log
........\stdout.log
........\syntmp
........\......\fft_test.msg
........\......\fft_test.plg
........\......\fft_test_flink.htm
........\......\fft_test_srr.htm
........\......\fft_test_toc.htm
........\......\sap.log
........\templates
........\.........\coregen.xml
........\tmp
........\...\_cg
........\transcript
........\verif
........\.....\fft_test.vif
........\.....\fft_test_bb.v
........\vsim.wlf
........\wave.do
........\work
........\....\fft
........\....\...\structure.asm
........\....\...\structure.dat
........\....\...\_primary.dat
........\....\fft_test
........\....\........\verilog.asm
........\....\........\_primary.dat

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