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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 642kb
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Introduction - If you have any usage issues, please Google them yourself
The source code is to achieve a 8051 mcu core of the VHDL code, interrupt, timer and other full-featured, and includes details of the various parts of the test document
Packet file list
(Preview for download)
doc
...\8051_overview.pdf
...\comp_orig_ipcore.pdf
...\mc8051_overview.pdf
...\mc8051_user_guide.pdf
msim
....\hex2dual.c
....\keil.dua
....\keil.hex
....\mc8051.cr.mti
....\mc8051.mpf
....\mc8051_compile.do
....\mc8051_rom.dua
....\mc8051_sim.do
....\mc8051_wave.do
....\readme.txt
....\regs.log
....\tc1.asm
....\tc1.dua
....\tc1.hex
....\vsim.wlf
....\work
....\....\addsub_core
....\....\...........\struc.dat
....\....\...........\_primary.dat
....\....\addsub_core_struc_cfg
....\....\.....................\_primary.dat
....\....\addsub_cy
....\....\.........\rtl.dat
....\....\.........\_primary.dat
....\....\addsub_cy_rtl_cfg
....\....\.................\_primary.dat
....\....\addsub_ovcy
....\....\...........\rtl.dat
....\....\...........\_primary.dat
....\....\addsub_ovcy_rtl_cfg
....\....\...................\_primary.dat
....\....\alucore
....\....\.......\rtl.dat
....\....\.......\_primary.dat
....\....\alucore_rtl_cfg
....\....\...............\_primary.dat
....\....\alumux
....\....\......\rtl.dat
....\....\......\_primary.dat
....\....\alumux_rtl_cfg
....\....\..............\_primary.dat
....\....\comb_divider
....\....\............\rtl.dat
....\....\............\_primary.dat
....\....\comb_divider_rtl_cfg
....\....\....................\_primary.dat
....\....\comb_mltplr
....\....\...........\rtl.dat
....\....\...........\_primary.dat
....\....\comb_mltplr_rtl_cfg
....\....\...................\_primary.dat
....\....\control_fsm
....\....\...........\rtl.dat
....\....\...........\_primary.dat
....\....\control_fsm_rtl_cfg
....\....\...................\_primary.dat
....\....\control_mem
....\....\...........\rtl.dat
....\....\...........\_primary.dat
....\....\control_mem_rtl_cfg
....\....\...................\_primary.dat
....\....\dcml_adjust
....\....\...........\rtl.dat
....\....\...........\_primary.dat
....\....\dcml_adjust_rtl_cfg
....\....\...................\_primary.dat
....\....\mc8051_alu
....\....\..........\struc.dat
....\....\..........\_primary.dat
....\....\mc8051_alu_struc_cfg
....\....\....................\_primary.dat
....\....\mc8051_control
....\....\..............\struc.dat
....\....\..............\_primary.dat
....\....\mc8051_control_struc_cfg
....\....\........................\_primary.dat
....\....\mc8051_core
....\....\...........\struc.dat
....\....\...........\_primary.dat
....\....\mc8051_core_struc_cfg
....\....\.....................\_primary.dat
....\....\mc8051_p
....\....\........\_primary.dat
....\....\mc8051_ram
....\....\..........\sim.dat
....\....\..........\_primary.dat
....\....\mc8051_ramx
....\....\...........\sim.dat
....\....\...........\_primary.dat
....\....\mc8051_ramx_sim_cfg
....\....\...................\_primary.dat
....\....\mc8051_ram_sim_cfg
....\....\..................\_primary.dat
....\....\mc8051_rom
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