Beijing-based company produced innovative EDA experimental toolbox of digital-analog conversion process. The program will be entered into the 5V signal from 01 to FF quantified by two digital tube display. Quantify the accuracy of 0.1v. Quartusll.5.1 version of the compiler environment. FPGA chip for EP18CQ240C6

模数转换
........\adc.asm.rpt
........\adc.cdf
........\adc.done
........\adc.fit.eqn
........\adc.fit.rpt
........\adc.fit.summary
........\adc.flow.rpt
........\adc.map.eqn
........\adc.map.rpt
........\adc.map.summary
........\adc.pin
........\adc.pof
........\adc.qpf
........\adc.qsf
........\adc.qws
........\adc.sof
........\adc.tan.rpt
........\adc.tan.summary
........\adc.vhd
........\db
........\..\adc.asm.qmsg
........\..\adc.cbx.xml
........\..\adc.cmp.cdb
........\..\adc.cmp.hdb
........\..\adc.cmp.qrpt
........\..\adc.cmp.rdb
........\..\adc.cmp.tdb
........\..\adc.cmp0.ddb
........\..\adc.dbp
........\..\adc.db_info
........\..\adc.eco.cdb
........\..\adc.fit.qmsg
........\..\adc.hier_info
........\..\adc.hif
........\..\adc.map.cdb
........\..\adc.map.hdb
........\..\adc.map.qmsg
........\..\adc.pre_map.cdb
........\..\adc.pre_map.hdb
........\..\adc.psp
........\..\adc.rtlv.hdb
........\..\adc.rtlv_sg.cdb
........\..\adc.rtlv_sg_swap.cdb
........\..\adc.sgdiff.cdb
........\..\adc.sgdiff.hdb
........\..\adc.signalprobe.cdb
........\..\adc.sld_design_entry.sci
........\..\adc.sld_design_entry_dsc.sci
........\..\adc.smp_dump.txt
........\..\adc.syn_hier_info
........\..\adc.tan.qmsg

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