Realized using Verilog language 8Bit encoder.

Compare_8_bits
..............\cmp_state.ini
..............\Compare_8_bits.asm.rpt
..............\Compare_8_bits.done
..............\Compare_8_bits.fit.eqn
..............\Compare_8_bits.fit.rpt
..............\Compare_8_bits.fit.summary
..............\Compare_8_bits.flow.rpt
..............\Compare_8_bits.map.eqn
..............\Compare_8_bits.map.rpt
..............\Compare_8_bits.map.summary
..............\Compare_8_bits.pin
..............\Compare_8_bits.pof
..............\Compare_8_bits.qpf
..............\Compare_8_bits.qsf
..............\Compare_8_bits.qws
..............\Compare_8_bits.sim.rpt
..............\Compare_8_bits.tan.rpt
..............\Compare_8_bits.tan.summary
..............\Compare_8_bits.v
..............\Compare_8_bits.vwf
..............\db
..............\..\Compare_8_bits.asm.qmsg
..............\..\Compare_8_bits.cmp.cdb
..............\..\Compare_8_bits.cmp.ddb
..............\..\Compare_8_bits.cmp.hdb
..............\..\Compare_8_bits.cmp.rdb
..............\..\Compare_8_bits.cmp.tdb
..............\..\Compare_8_bits.cmp0.ddb
..............\..\Compare_8_bits.db_info
..............\..\Compare_8_bits.eco.cdb
..............\..\Compare_8_bits.eds_overflow
..............\..\Compare_8_bits.fit.qmsg
..............\..\Compare_8_bits.hier_info
..............\..\Compare_8_bits.hif
..............\..\Compare_8_bits.map.cdb
..............\..\Compare_8_bits.map.hdb
..............\..\Compare_8_bits.map.qmsg
..............\..\Compare_8_bits.pre_map.cdb
..............\..\Compare_8_bits.pre_map.hdb
..............\..\Compare_8_bits.psp
..............\..\Compare_8_bits.rtlv.hdb
..............\..\Compare_8_bits.rtlv_sg.cdb
..............\..\Compare_8_bits.rtlv_sg_swap.cdb
..............\..\Compare_8_bits.sgdiff.cdb
..............\..\Compare_8_bits.sgdiff.hdb
..............\..\Compare_8_bits.sim.hdb
..............\..\Compare_8_bits.sim.qmsg
..............\..\Compare_8_bits.sim.rdb
..............\..\Compare_8_bits.sim.vwf
..............\..\Compare_8_bits.sld_design_entry.sci
..............\..\Compare_8_bits.sld_design_entry_dsc.sci
..............\..\Compare_8_bits.syn_hier_info
..............\..\Compare_8_bits.tan.qmsg
..............\..\Compare_8_bits_cmp.qrpt
..............\..\Compare_8_bits_sim.qrpt

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