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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 3.07mb
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Introduction - If you have any usage issues, please Google them yourself
S11_USB, maxII the FPGA chip, USB20 transceiver show
Packet file list
(Preview for download)
S11_USB
.......\READ_FIFO
.......\.........\Apptest
.......\.........\.......\ezusbsys.h
.......\.........\.......\ReadMe.txt
.......\.........\.......\Release
.......\.........\.......\res
.......\.........\.......\...\cursor1.cur
.......\.........\.......\...\icon5.ico

.......\.........\.......\...\Test.rc2
.......\.........\.......\...\usb.ico
.......\.........\.......\Resource.h
.......\.........\.......\StdAfx.cpp
.......\.........\.......\StdAfx.h
.......\.........\.......\Test.aps
.......\.........\.......\Test.clw
.......\.........\.......\Test.cpp
.......\.........\.......\Test.dsp
.......\.........\.......\Test.dsw
.......\.........\.......\Test.h
.......\.........\.......\Test.ncb
.......\.........\.......\Test.opt
.......\.........\.......\Test.plg
.......\.........\.......\Test.rc
.......\.........\.......\TestDlg.cpp
.......\.........\.......\TestDlg.h
.......\.........\rd_fifo
.......\.........\.......\asyn_rd.asm.rpt
.......\.........\.......\asyn_rd.cdf
.......\.........\.......\asyn_rd.cr.mti
.......\.........\.......\asyn_rd.done
.......\.........\.......\asyn_rd.fit.eqn
.......\.........\.......\asyn_rd.fit.rpt
.......\.........\.......\asyn_rd.fit.summary
.......\.........\.......\asyn_rd.flow.rpt
.......\.........\.......\asyn_rd.map.eqn
.......\.........\.......\asyn_rd.map.rpt
.......\.........\.......\asyn_rd.map.summary
.......\.........\.......\asyn_rd.mpf
.......\.........\.......\asyn_rd.pin
.......\.........\.......\asyn_rd.pof
.......\.........\.......\asyn_rd.qpf
.......\.........\.......\asyn_rd.qsf
.......\.........\.......\asyn_rd.qsf.bak
.......\.........\.......\asyn_rd.qws
.......\.........\.......\asyn_rd.sim.rpt
.......\.........\.......\asyn_rd.sof
.......\.........\.......\asyn_rd.tan.rpt
.......\.........\.......\asyn_rd.tan.summary
.......\.........\.......\asyn_rd.v
.......\.........\.......\asyn_rd.vwf
.......\.........\.......\asyn_rd_assignment_defaults.qdf
.......\.........\.......\asyn_rd_tb.v
.......\.........\.......\cmp_state.ini
.......\.........\.......\db
.......\.........\.......\..\altsyncram_5i92.tdf
.......\.........\.......\..\altsyncram_9i92.tdf
.......\.........\.......\..\altsyncram_np92.tdf
.......\.........\.......\..\altsyncram_tg91.tdf
.......\.........\.......\..\asyn_rd.asm.qmsg
.......\.........\.......\..\asyn_rd.asm_labs.ddb
.......\.........\.......\..\asyn_rd.cbx.xml
.......\.........\.......\..\asyn_rd.cmp.cdb
.......\.........\.......\..\asyn_rd.cmp.hdb
.......\.........\.......\..\asyn_rd.cmp.logdb
.......\.........\.......\..\asyn_rd.cmp.rdb
.......\.........\.......\..\asyn_rd.cmp.tdb
.......\.........\.......\..\asyn_rd.cmp0.ddb
.......\.........\.......\..\asyn_rd.cmp2.ddb
.......\.........\.......\..\asyn_rd.db_info
.......\.........\.......\..\asyn_rd.eco.cdb
.......\.........\.......\..\asyn_rd.fit.qmsg
.......\.........\.......\..\asyn_rd.hier_info
.......\.........\.......\..\asyn_rd.hif
.......\.........\.......\..\asyn_rd.map.cdb
.......\.........\.......\..\asyn_rd.map.hdb
.......\.........\.......\..\asyn_rd.map.logdb
.......\.........\.......\..\asyn_rd.map.qmsg
.......\.........\.......\..\asyn_rd.pre_map.cdb
.......\.........\.......\..\asyn_rd.pre_map.hdb
.......\.........\.......\..\asyn_rd.psp
.......\.........\.......\..\asyn_rd.rtlv.hdb
.......\.........\.......\..\asyn_rd.rtlv_sg.cdb
.......\.........\.......\..\asyn_rd.rtlv_sg_swap.cdb
.......\.........\.......\..\asyn_rd.sgdiff.cdb
.......\.........\.......\..\asyn_rd.sgdiff.hdb
.......\.........\.......\..\asyn_rd.signalprobe.cdb
.......\.........\.......\..\asyn_rd.sld_design_entry.sci
.......\.........\.......\..\asyn_rd.sld_design_entry_dsc.sci
.......\.........\.......\..\asyn_rd.syn_hier_info
.......\.........\.......\..\asyn_rd.tan.qmsg
.......\.........\.......\..\asyn_rd_cmp.qrpt
.......\.........\.......\..\asyn_rd_sim.qrpt
.......\.........\.......\..\cntr_1a9.tdf
.......\.........\.......\..\cntr_278.tdf
.......\.........\.......\..\cntr_7v7.tdf
.......\.........\.......\..\cntr_909.tdf
.......\.........\.......\..\cntr_f29.tdf
.......\.........\.......\..\c
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