Contains a large number of examples for learning Verilog language.

新建文件夹
..........\source
..........\......\chap3
..........\......\.....\adder4.acf
..........\......\.....\adder4.hif
..........\......\.....\adder4.ndb
..........\......\.....\adder4.v
..........\......\.....\adder_tp.v
..........\......\.....\aoi.v
..........\......\.....\count4.v
..........\......\.....\count4_tp.v
..........\......\.....\modelsim.ini
..........\......\.....\tcl_stacktrace.txt
..........\......\.....\transcript
..........\......\.....\work
..........\......\.....\....\_info
..........\......\chap5
..........\......\.....\adder.v
..........\......\.....\adder16.v
..........\......\.....\alu.v
..........\......\.....\block.v
..........\......\.....\buried_ff.v
..........\......\.....\compile.v
..........\......\.....\count.v
..........\......\.....\count60.v
..........\......\.....\decode4_7.v
..........\......\.....\loop1.v
..........\......\.....\loop2.v
..........\......\.....\loop3.v
..........\......\.....\mult_for.v
..........\......\.....\mult_repeat.v
..........\......\.....\mux21_1.v
..........\......\.....\mux21_2.v
..........\......\.....\mux4_1.v
..........\......\.....\mux_casez.v
..........\......\.....\non_block.v
..........\......\.....\test.v
..........\......\.....\voter7.v
..........\......\.....\wave1.v
..........\......\.....\wave2.v
..........\......\chap6
..........\......\.....\alutask.v
..........\......\.....\alu_tp.v
..........\......\.....\code_83.v
..........\......\.....\count.v
..........\......\.....\funct.v
..........\......\.....\funct_tp.v
..........\......\.....\modelsim.ini
..........\......\.....\paral1.v
..........\......\.....\paral2.v
..........\......\.....\serial1.v
..........\......\.....\serial2.v
..........\......\.....\transcript
..........\......\.....\work
..........\......\.....\....\_info
..........\......\examples.pdf
..........\Verilog HDL练习题.pdf
..........\连续输入数据处理.doc

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