serial UART VHDL Language Program. I debug, and very easy to use

clk_pdiv.inc
clk_pdiv.sym
clk_pdiv.tdf
filterx.inc
filterx.sym
filterx.tdf
filt_tpl.inc
filt_tpl.sym
filt_tpl.tdf
Par_Gen.inc
Par_Gen.sym
Par_Gen.tdf
Readme.txt
rx.sym
rx.tdf
shiftreg.inc
shiftreg.sym
shiftreg.tdf
tx.sym
tx.tdf
uart.gdf
uart.inc
uart.sym
uartctrl.sym
uartctrl.tdf
uarttest.acf
uarttest.gdf
uarttest.scf

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