With VERILOG HDL realize arbitrary frequency divider source code, is a generic procedure

Frequency_divider
.................\Block1.bdf
.................\cmp_state.ini
.................\Counter_N.v
.................\db
.................\..\Frequency_divider.asm.qmsg
.................\..\Frequency_divider.cbx.xml
.................\..\Frequency_divider.cmp.cdb
.................\..\Frequency_divider.cmp.hdb
.................\..\Frequency_divider.cmp.rdb
.................\..\Frequency_divider.cmp.tdb
.................\..\Frequency_divider.cmp0.ddb
.................\..\Frequency_divider.db_info
.................\..\Frequency_divider.eco.cdb
.................\..\Frequency_divider.eds_overflow
.................\..\Frequency_divider.fit.qmsg
.................\..\Frequency_divider.hier_info
.................\..\Frequency_divider.hif
.................\..\Frequency_divider.map.cdb
.................\..\Frequency_divider.map.hdb
.................\..\Frequency_divider.map.qmsg
.................\..\Frequency_divider.pre_map.cdb
.................\..\Frequency_divider.pre_map.hdb
.................\..\Frequency_divider.psp
.................\..\Frequency_divider.rtlv.hdb
.................\..\Frequency_divider.rtlv_sg.cdb
.................\..\Frequency_divider.rtlv_sg_swap.cdb
.................\..\Frequency_divider.sgdiff.cdb
.................\..\Frequency_divider.sgdiff.hdb
.................\..\Frequency_divider.signalprobe.cdb
.................\..\Frequency_divider.sim.hdb
.................\..\Frequency_divider.sim.qmsg
.................\..\Frequency_divider.sim.rdb
.................\..\Frequency_divider.sim.vwf
.................\..\Frequency_divider.sld_design_entry.sci
.................\..\Frequency_divider.sld_design_entry_dsc.sci
.................\..\Frequency_divider.syn_hier_info
.................\..\Frequency_divider.tan.qmsg
.................\..\Frequency_divider_cmp.qrpt
.................\..\Frequency_divider_sim.qrpt
.................\Frequency_divider.asm.rpt
.................\Frequency_divider.bsf
.................\Frequency_divider.done
.................\Frequency_divider.fit.eqn
.................\Frequency_divider.fit.rpt
.................\Frequency_divider.fit.summary
.................\Frequency_divider.flow.rpt
.................\Frequency_divider.map.eqn
.................\Frequency_divider.map.rpt
.................\Frequency_divider.map.summary
.................\Frequency_divider.pin
.................\Frequency_divider.pof
.................\Frequency_divider.qpf
.................\Frequency_divider.qsf
.................\Frequency_divider.qws
.................\Frequency_divider.sim.rpt
.................\Frequency_divider.sof
.................\Frequency_divider.tan.rpt
.................\Frequency_divider.tan.summary
.................\Frequency_divider.v
.................\Frequency_divider.vwf
.................\Freq_div_2.v
.................\F_Div_20.bsf
.................\F_Div_20.v
.................\Half_sel.v

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