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lab08_web

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 8.4mb
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Introduction - If you have any usage issues, please Google them yourself
Practical program code, in the hope that useful to everybody, has debugging through
Packet file list
(Preview for download)
Lab08_Web
.........\.xcs
.........\bram_init.sh
.........\code
.........\....\.xcs
.........\....\CVS
.........\....\...\Entries
.........\....\...\Repository
.........\....\...\Root
.........\....\linker_script
.........\....\web.c
.........\....\web.h
.........\CVS
.........\...\Entries
.........\...\Repository
.........\...\Root
.........\data
.........\....\.xcs
.........\....\CVS
.........\....\...\Entries
.........\....\...\Repository
.........\....\...\Root
.........\....\system.ucf
.........\etc
.........\...\.xcs
.........\...\bitgen.opt
.........\...\bitgen.ut
.........\...\CVS
.........\...\...\Entries
.........\...\...\Repository
.........\...\...\Root
.........\...\download.cmd
.........\...\fast_runtime.opt
.........\...\xc18v04_vq44.bsd
.........\hdl
.........\...\bram1_wrapper.vhd
.........\...\cache
.........\...\inst_jtagppc_cntlr_wrapper.vhd
.........\...\myether_wrapper.vhd
.........\...\mygpio_wrapper.vhd
.........\...\mymem_wrapper.vhd
.........\...\myopb_wrapper.vhd
.........\...\myplb2opb_wrapper.vhd
.........\...\myplbbram_cntlr_wrapper.vhd
.........\...\myplb_wrapper.vhd
.........\...\myuart_wrapper.vhd
.........\...\ppc405_i_wrapper.vhd
.........\...\reset_block_wrapper.vhd
.........\...\system.vhd
.........\implementation
.........\..............\bitgen.ut
.........\..............\bram1_wrapper.ngc
.........\..............\bram_init.bmm
.........\..............\cache
.........\..............\.....\bram1_wrapper.ngc
.........\..............\.....\cache.lst
.........\..............\.....\inst_jtagppc_cntlr_wrapper.ngc
.........\..............\.....\myether_wrapper.ngc
.........\..............\.....\mygpio_wrapper.ngc
.........\..............\.....\mymem_wrapper.ngc
.........\..............\.....\myopb_wrapper.ngc
.........\..............\.....\myplb2opb_wrapper.ngc
.........\..............\.....\myplbbram_cntlr_wrapper.ngc
.........\..............\.....\myplb_wrapper.ngc
.........\..............\.....\myuart_wrapper.ngc
.........\..............\.....\ppc405_i_wrapper.ngc
.........\..............\.....\reset_block_wrapper.ngc
.........\..............\download.bit
.........\..............\download_cclktemp.bit
.........\..............\ethernet_v1_00_j_bmem_v2.edn
.........\..............\ethernet_v1_00_j_dmem_v2.edn
.........\..............\ethernet_v1_00_j_dmem_v2.ngo
.........\..............\ethernet_v1_00_j_txbmem_v2.edn
.........\..............\ethernet_v1_00_j_txdmem_v2.edn
.........\..............\ethernet_v1_00_j_txdmem_v2.ngo
.........\..............\fast_runtime.opt
.........\..............\fpga.flw
.........\..............\inst_jtagppc_cntlr_wrapper.ngc
.........\..............\myether_wrapper.ngc
.........\..............\mygpio_wrapper.ngc
.........\..............\mymem_wrapper.ngc
.........\..............\myopb_wrapper.ngc
.........\..............\myplb2opb_wrapper.ngc
.........\..............\myplbbram_cntlr_wrapper.ngc
.........\..............\myplb_wrapper.ngc
.........\..............\myuart_wrapper.ngc
.........\..............\netlist.lst
.........\..............\ppc405_i_wrapper.ngc
.........\..............\prom_file.mcs
.........\..............\prom_file.prm
.........\..............\prom_file.sig
.........\..............\reset_block_wrapper.ngc
.........\..............\system.bgn
.........\..............\system.bit
.........\..............\system.bld
.........\..............\system.bmm
.........\..............\system.dly
.........\..............\system.drc
.........\..............\system.msk
.........\..............\system.ncd
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