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AlteraFPGA

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 47kb
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  • Author :骆***
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Introduction - If you have any usage issues, please Google them yourself
In Altera
Packet file list
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实战训练1 2.5 在Altera的FPGA开发板上运行第一个FPGA程序
......................................................\cmp_state.ini
......................................................\liangzhu.asm.rpt
......................................................\liangzhu.cdf
......................................................\liangzhu.done
......................................................\liangzhu.fit.eqn
......................................................\liangzhu.fit.rpt
......................................................\liangzhu.fit.summary
......................................................\liangzhu.flow.rpt
......................................................\liangzhu.map.eqn
......................................................\liangzhu.map.rpt
......................................................\liangzhu.map.summary
......................................................\liangzhu.pin
......................................................\liangzhu.pof
......................................................\liangzhu.qpf
......................................................\liangzhu.qsf
......................................................\liangzhu.qws
......................................................\liangzhu.sof
......................................................\liangzhu.tan.rpt
......................................................\liangzhu.tan.summary
......................................................\liangzhu.v
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