Typical examples, from the Internet down, and I hope useful for everyone,

典型实例9 SignalTap II 功能演示
...............................\S3_WAVE
...............................\.......\PROJ
...............................\.......\....\cmp_state.ini
...............................\.......\....\COUNTER.bsf
...............................\.......\....\COUNTER.v
...............................\.......\....\COUNTER_bb.v

...............................\.......\....\COUNTER_waveforms.html
...............................\.......\....\div.bsf
...............................\.......\....\div.v
...............................\.......\....\h.bsf
...............................\.......\....\h.v
...............................\.......\....\h_bb.v
...............................\.......\....\insystem.bmp
...............................\.......\....\PROJ.rar
...............................\.......\....\ROM.bsf
...............................\.......\....\ROM.v
...............................\.......\....\ROM_bb.v
...............................\.......\....\serv_req_info.txt
...............................\.......\....\signal-tap.bmp
...............................\.......\....\simulation
...............................\.......\....\..........\modelsim
...............................\.......\....\..........\........\cyclone_atoms.v
...............................\.......\....\..........\........\vsim.wlf
...............................\.......\....\..........\........\wave.do
...............................\.......\....\..........\........\WAVE.vo
...............................\.......\....\..........\........\WAVE_modelsim.xrf
...............................\.......\....\..........\........\wave_test.cr.mti
...............................\.......\....\..........\........\wave_test.mpf
...............................\.......\....\..........\........\WAVE_TOP.V
...............................\.......\....\..........\........\WAVE_v.sdo
...............................\.......\....\..........\........\work
...............................\.......\....\..........\........\....\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e
...............................\.......\....\..........\........\....\................................\verilog.asm
...............................\.......\....\..........\........\....\................................\_primary.dat
...............................\.......\....\..........\........\....\................................\_primary.vhd
...............................\.......\....\..........\........\....\@w@a@v@e
...............................\.......\....\..........\........\....\........\verilog.asm
...............................\.......\....\..........\........\....\........\_primary.dat
...............................\.......\....\..........\........\....\........\_primary.vhd
...............................\.......\....\..........\........\....\cyclone_and1
...............................\.......\....\..........\........\....\............\verilog.asm
...............................\.......\....\..........\........\....\............\_primary.dat
...............................\.......\....\..........\........\....\............\_primary.vhd
...............................\.......\....\..........\........\....\cyclone_and16
...............................\.......\....\..........\........\....\.............\verilog.asm
...............................\.......\....\..........\........\....\.............\_primary.dat
...............................\.......\....\..........\........\....\.............\_primary.vhd
...............................\.......\....\..........\........\....\cyclone_asmiblock
...............................\.......\....\..........\........\....\.................\verilog.asm
...............................\.......\....\..........\........\....\.................\_primary.dat
...............................\.......\....\..........\........\....\.................\_primary.vhd
...............................\.......\....\..........\........\....\cyclone_asynch_io
...............................\.......\....\..........\........\....\.................\verilog.asm
..................

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