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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 291kb
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  • Author :ljd20******
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Introduction - If you have any usage issues, please Google them yourself
This is a LED light up the VHDL procedure, let everyone together to share
Packet file list
(Preview for download)
实验一:点亮LED(发光二极管)
.............................\exp1
.............................\....\cmp_state.ini
.............................\....\db
.............................\....\..\LED.db_info
.............................\....\..\LED.eco.cdb
.............................\....\..\LED.sld_design_entry.sci
.............................\....\..\LED_cmp.qrpt
.............................\....\LED.asm.rpt
.............................\....\LED.cdf
.............................\....\LED.done
.............................\....\LED.fit.eqn
.............................\....\LED.fit.rpt
.............................\....\LED.fit.summary
.............................\....\LED.flow.rpt
.............................\....\LED.map.eqn
.............................\....\LED.map.rpt
.............................\....\LED.map.summary
.............................\....\LED.pin
.............................\....\LED.pof
.............................\....\LED.qpf
.............................\....\LED.qsf
.............................\....\LED.qws
.............................\....\LED.tan.rpt
.............................\....\LED.v
.............................\....\LED_assignment_defaults.qdf
.............................\实验一:点亮LED(发光二极管).doc
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