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FFT_VHDL

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 427kb
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  • Author :夏***
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Introduction - If you have any usage issues, please Google them yourself
FFT of the FPGA test procedure to achieve there. FPGA want to be helpful to learn a friend!
Packet file list
(Preview for download)
16位浮点FFT算法的VHDL实现(有测试文件)
.....................................\16位浮点FFT算法的VHDL实现(有测试文件)
.....................................\.....................................\FFT
.....................................\.....................................\...\FFT_report.pdf
.....................................\.....................................\...\synth_fft
.....................................\.....................................\...\.........\and_gates.vhd
.....................................\.....................................\...\.........\baseindex.vhd
.....................................\.....................................\...\.........\but.vhd
.....................................\.....................................\...\.........\butter_lib.vhd
.....................................\.....................................\...\.........\comm.txt
.....................................\.....................................\...\.........\control2.vhd
.....................................\.....................................\...\.........\controller.vhd
.....................................\.....................................\...\.........\counter.vhd
.....................................\.....................................\...\.........\cycles_but.vhd
.....................................\.....................................\...\.........\dff.vhd
.....................................\.....................................\...\.........\divide.vhd
.....................................\.....................................\...\.........\FLOAT2.PIF
.....................................\.....................................\...\.........\FLOAT_RE.TXT
.....................................\.....................................\...\.........\IEEE_TO_.PIF
.....................................\.....................................\...\.........\ioadd.vhd
.....................................\.....................................\...\.........\iod_staged.vhd
.....................................\.....................................\...\.........\lblock.vhd
.....................................\.....................................\...\.........\mult.vhd
.....................................\.....................................\...\.........\multiply.vhd
.....................................\.....................................\...\.........\mux_add.vhd
.....................................\.....................................\...\.........\mux_but.vhd
.....................................\.....................................\...\.........\negate.vhd
.....................................\.....................................\...\.........\normalize.vhd
.....................................\.....................................\...\.........\out_result.vhd
.....................................\.....................................\...\.........\print.vhd
.....................................\.....................................\...\.........\ram.vhd
.....................................\.....................................\...\.........\ram_shift.vhd
.....................................\.....................................\...\.........\rblock.vhd
.....................................\.....................................\...\.........\result.txt
.....................................\.....................................\...\.........\rom.vhd
.....................................\.....................................\...\.........\romadd_gen.vhd
.....................................\.....................................\...\.........\rom_ram.vhd
.....................................\.....................................\...\.........\shift2.vhd
.....................................\.....................................\...\.........\simili.lst
.....................................\.....................................\...\.........\stage.vhd
.....................................\.....................................\...\.........\subtractor.vhd
.....................................\..........
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