On the lcd of the VHDL code, is divided into three modules, proven correct

lcd_zifu
........\clockdiv.vhd
........\cmp_state.ini
........\db
........\..\add_sub_0ih.tdf
........\..\add_sub_fgh.tdf
........\..\add_sub_ggh.tdf
........\..\add_sub_roh.tdf
........\..\cntr_p78.tdf
........\..\lcdcont-sim.vwf
........\..\lcdcont.asm.qmsg
........\..\lcdcont.cmp.cdb
........\..\lcdcont.cmp.ddb
........\..\lcdcont.cmp.hdb
........\..\lcdcont.cmp.rdb
........\..\lcdcont.cmp.tdb
........\..\lcdcont.cmp0.ddb
........\..\lcdcont.db_info
........\..\lcdcont.eco.cdb
........\..\lcdcont.eds_overflow
........\..\lcdcont.fit.qmsg
........\..\lcdcont.hier_info
........\..\lcdcont.hif
........\..\lcdcont.icc
........\..\lcdcont.map.cdb
........\..\lcdcont.map.hdb
........\..\lcdcont.map.qmsg
........\..\lcdcont.pre_map.cdb
........\..\lcdcont.pre_map.hdb
........\..\lcdcont.psp
........\..\lcdcont.rtlv.hdb
........\..\lcdcont.rtlv_sg.cdb
........\..\lcdcont.rtlv_sg_swap.cdb
........\..\lcdcont.sgdiff.cdb
........\..\lcdcont.sgdiff.hdb
........\..\lcdcont.signalprobe.cdb
........\..\lcdcont.sim.hdb
........\..\lcdcont.sim.qmsg
........\..\lcdcont.sim.rdb
........\..\lcdcont.sim.vwf
........\..\lcdcont.sld_design_entry.sci
........\..\lcdcont.sld_design_entry_dsc.sci
........\..\lcdcont.syn_hier_info
........\..\lcdcont.tan.qmsg
........\..\lcdcont_cmp.qrpt
........\..\lcdcont_hier_info
........\..\mux_lac.tdf
........\lcd.vhd
........\lcdcont.asm.rpt
........\lcdcont.cdf
........\lcdcont.done
........\lcdcont.fit.eqn
........\lcdcont.fit.rpt
........\lcdcont.fit.summary
........\lcdcont.flow.rpt
........\lcdcont.map.eqn
........\lcdcont.map.rpt
........\lcdcont.map.summary
........\lcdcont.pin
........\lcdcont.pof
........\lcdcont.qpf
........\lcdcont.qsf
........\lcdcont.qws
........\lcdcont.sim.rpt
........\lcdcont.sof
........\lcdcont.tan.rpt
........\lcdcont.tan.summary
........\lcdcont.vhd
........\lcdcont.vwf
........\lcdcont_assignment_defaults.qdf
........\sim.cfg

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