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ps2_soc1

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.41mb
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  • Author :张****
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ps2 keyboard controller
Packet file list
(Preview for download)
ps2_soc1
........\build_4.ucf
........\hdl
........\...\lcd_test_pongball.v
........\...\ps2.v
........\...\serial.v
........\...\top.v
........\hds
........\...\.cache.dat
........\...\_top._epf
........\lcd_test_pongball.v
........\ps2.v
........\ps_soc
........\......\db
........\......\..\altsyncram_cki2.tdf
........\......\..\cmpr_doh.tdf
........\......\..\cntr_abf.tdf
........\......\..\cntr_blf.tdf
........\......\..\cntr_ccg.tdf
........\......\..\cntr_khh.tdf
........\......\..\cntr_oge.tdf
........\......\..\decode_lhi.tdf
........\......\..\ps.asm.qmsg
........\......\..\ps.asm_labs.ddb
........\......\..\ps.cbx.xml
........\......\..\ps.cmp.cdb
........\......\..\ps.cmp.hdb
........\......\..\ps.cmp.kpt
........\......\..\ps.cmp.logdb
........\......\..\ps.cmp.rdb
........\......\..\ps.cmp.tdb
........\......\..\ps.cmp0.ddb
........\......\..\ps.cmp2.ddb
........\......\..\ps.dbp
........\......\..\ps.db_info
........\......\..\ps.eco.cdb
........\......\..\ps.eda.qmsg
........\......\..\ps.fit.qmsg
........\......\..\ps.hier_info
........\......\..\ps.hif
........\......\..\ps.map.cdb
........\......\..\ps.map.hdb
........\......\..\ps.map.logdb
........\......\..\ps.map.qmsg
........\......\..\ps.pre_map.cdb
........\......\..\ps.pre_map.hdb
........\......\..\ps.psp
........\......\..\ps.pss
........\......\..\ps.rtlv.hdb
........\......\..\ps.rtlv_sg.cdb
........\......\..\ps.rtlv_sg_swap.cdb
........\......\..\ps.sgdiff.cdb
........\......\..\ps.sgdiff.hdb
........\......\..\ps.signalprobe.cdb
........\......\..\ps.sld_design_entry.sci
........\......\..\ps.sld_design_entry_dsc.sci
........\......\..\ps.smp_dump.txt
........\......\..\ps.syn_hier_info
........\......\..\ps.tan.qmsg
........\......\ps.asm.rpt
........\......\ps.cdf
........\......\ps.done
........\......\ps.dpf
........\......\ps.eda.rpt
........\......\ps.fit.rpt
........\......\ps.fit.smsg
........\......\ps.fit.summary
........\......\ps.flow.rpt
........\......\ps.map.rpt
........\......\ps.map.summary
........\......\ps.pin
........\......\ps.pof
........\......\ps.qpf
........\......\ps.qsf
........\......\ps.qws
........\......\ps.sof
........\......\ps.tan.rpt
........\......\ps.tan.summary
........\......\quartus_nativelink_synthesis.log
........\......\simulation
........\......\..........\modelsim
........\......\..........\........\ps.vo
........\......\..........\........\ps_modelsim.xrf
........\......\..........\........\ps_v.sdo
........\......\stp1.stp
........\......\synplify_work
........\......\.............\stdout.log
........\......\.............\top.sdc
........\......\.............\top_alt.tcl
........\serial.v
........\synplify
........\........\proj_1.prd
........\........\proj_1.prj
........\........\rev_1
........\........\.....\AutoConstraint_top.sdc
........\........\.....\par_1
........\........\.....\rpt_top.areasrr
........\........\.....\rpt_top_areasrr.htm
........\........\.....\syntmp
........\........\.....\......\top.msg
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