VHDL language used to describe the function of the clock and through the Seven-Segment display decoder output.

shizhong
........\clock.asm.rpt
........\clock.done
........\clock.fit.rpt
........\clock.fit.smsg
........\clock.fit.summary
........\clock.flow.rpt
........\clock.map.rpt
........\clock.map.summary
........\clock.pin
........\clock.pof
........\clock.qpf
........\clock.qsf
........\clock.sof
........\clock.tan.rpt
........\clock.tan.summary
........\clock.vhd

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