VHDL generated clock frequency of 50 procedures, the reference for beginners

f50k
....\cmp_state.ini
....\db
....\..\add_sub_1bh.tdf
....\..\add_sub_1nh.tdf
....\..\add_sub_4bh.tdf
....\..\add_sub_5bh.tdf
....\..\add_sub_5nh.tdf
....\..\add_sub_80h.tdf
....\..\add_sub_hch.tdf
....\..\add_sub_llh.tdf
....\..\add_sub_olh.tdf
....\..\add_sub_plh.tdf
....\..\add_sub_sah.tdf
....\..\f50k-sim.vwf
....\..\f50k.asm.qmsg
....\..\f50k.cbx.xml
....\..\f50k.cmp.cdb
....\..\f50k.cmp.hdb
....\..\f50k.cmp.logdb
....\..\f50k.cmp.rdb
....\..\f50k.cmp.tdb
....\..\f50k.cmp0.ddb
....\..\f50k.dbp
....\..\f50k.db_info
....\..\f50k.eco.cdb
....\..\f50k.eds_overflow
....\..\f50k.fit.qmsg
....\..\f50k.fnsim.cdb
....\..\f50k.fnsim.hdb
....\..\f50k.fnsim.qmsg
....\..\f50k.hier_info
....\..\f50k.hif
....\..\f50k.map.cdb
....\..\f50k.map.hdb
....\..\f50k.map.logdb
....\..\f50k.map.qmsg
....\..\f50k.pre_map.cdb
....\..\f50k.pre_map.hdb
....\..\f50k.psp
....\..\f50k.rtlv.hdb
....\..\f50k.rtlv_sg.cdb
....\..\f50k.rtlv_sg_swap.cdb
....\..\f50k.sgdiff.cdb
....\..\f50k.sgdiff.hdb
....\..\f50k.sim.hdb
....\..\f50k.sim.qmsg
....\..\f50k.sim.rdb
....\..\f50k.sim_ori.vwf
....\..\f50k.sld_design_entry.sci
....\..\f50k.sld_design_entry_dsc.sci
....\..\f50k.syn_hier_info
....\..\f50k.tan.qmsg
....\..\f50k_cmp.qrpt
....\..\f50k_hier_info
....\..\f50k_sim.qrpt
....\..\f50k_syn_hier_info
....\..\mux_9ac.tdf
....\..\mux_r6c.tdf
....\..\wed.zsf
....\f50k.asm.rpt
....\f50k.done
....\f50k.fit.eqn
....\f50k.fit.rpt
....\f50k.fit.summary
....\f50k.fld
....\f50k.flow.rpt
....\f50k.map.eqn
....\f50k.map.rpt
....\f50k.map.summary
....\f50k.pin
....\f50k.pof
....\f50k.ppl
....\f50k.qpf
....\f50k.qsf
....\f50k.qws
....\f50k.sim.rpt
....\f50k.sof
....\f50k.tan.rpt
....\f50k.tan.summary
....\f50k.vhd
....\f50k.vwf
....\f50k_assignment_defaults.qdf
....\sim.cfg
....\transcript

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