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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 290kb
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  • Author :05081*****
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Introduction - If you have any usage issues, please Google them yourself
VHDL language using a snake-like procedures, debugging success can be realized. Quarters ii can run on, welcome to use
Packet file list
(Preview for download)
02 snake
........\cmp_state.ini
........\db
........\..\Snake.asm.qmsg
........\..\Snake.cmp.cdb
........\..\Snake.cmp.ddb
........\..\Snake.cmp.hdb
........\..\Snake.cmp.rdb
........\..\Snake.cmp.tdb
........\..\Snake.dat_manager.dat
........\..\Snake.db_info
........\..\Snake.fit.qmsg
........\..\Snake.hier_info
........\..\Snake.hif
........\..\Snake.icc
........\..\Snake.map.cdb
........\..\Snake.map.hdb
........\..\Snake.map.qmsg
........\..\Snake.pre_map.hdb
........\..\Snake.project.hdb
........\..\Snake.rtlv.hdb
........\..\Snake.rtlv_sg.cdb
........\..\Snake.rtlv_sg_swap.cdb
........\..\Snake.sgdiff.cdb
........\..\Snake.sgdiff.hdb
........\..\Snake.signalprobe.cdb
........\..\Snake.sld_design_entry.sci
........\..\Snake.sld_design_entry_dsc.sci
........\..\Snake.syn_hier_info
........\..\Snake.tan.qmsg
........\..\Snake_cmp.qrpt
........\..\Snake_hier_info
........\..\Snake_syn_hier_info
........\fenpin.vhd
........\scan.vhd
........\Snake.asm.rpt
........\Snake.cdf
........\Snake.done
........\Snake.fit.eqn
........\Snake.fit.rpt
........\Snake.fit.summary
........\Snake.flow.rpt
........\Snake.map.eqn
........\Snake.map.rpt
........\Snake.map.summary
........\Snake.pin
........\Snake.pof
........\Snake.ppl
........\Snake.qpf
........\Snake.qsf
........\Snake.qws
........\Snake.sof
........\Snake.tan.rpt
........\Snake.tan.summary
........\Snake.v
........\snake.vhd
........\snaketop.bdf
........\Snake_assignment_defaults.qdf
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