VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC published examples here is 1-20 months

10_function
...........\10_bit_to_int.vhd
...........\README.TXT
11_wiredor
..........\11_wiredor.vhd
..........\README.TXT
12_convert
..........\12_convert.vhd
..........\README.TXT
13_SHL
......\13_SHL.VHD
......\README.TXT
14_MVL7_functions
.................\14_MVL7_functions.vhd
.................\README.TXT
15_MUX41
........\15_MUX41.VHD
........\15_MVL7_functions.vhd
........\15_MVL7_syn_types.vhd
........\15_test_vectors_mux41.vhd
........\15_TYPES.VHD
........\README.TXT
16_MUX
......\16_multiple_mux.vhd
......\16_MVL7_functions.vhd
......\16_test_vectors.vhd
......\16_TYPES.VHD
......\README.TXT
......\TYPES.VHD
17_parity
.........\17_parity.vhd
.........\17_test_bench.vhd
.........\README.TXT
18_LIB
......\18_tech_lib.vhd
......\18_test_lib.vhd
......\README.TXT
19_test_194
...........\19_test_194.vhd
1_ADDER
.......\1_ADDER.VHD
.......\README.TXT
20_test_159
...........\20_test_159.vhd
2_ADDER
.......\2_ADDER.VHD
.......\README.TXT
3_MUL
.....\3_MUL.VHD
.....\README.TXT
4_COMP
......\4_COMP.VHD
......\README.TXT
5_MUX2
......\5_MUX2.VHD
......\README.TXT
6_REG
.....\6_REG.VHD
.....\README.TXT
7_shiftreg
..........\7_MVL7_functions.vhd
..........\7_shiftreg.vhd
..........\7_synthesis_types.vhd
..........\7_test_vector.vhd
..........\7_TYPES.VHD
..........\README.TXT
8_BITPKG
........\8_BITPKG.VHD
........\8_bit_rtl_lib.vhd
........\README.TXT
9_MVL7_TYPES
............\9_MVL7_types.vhd
............\README.TXT

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