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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 4.16mb
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  • Author :j*****
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Introduction - If you have any usage issues, please Google them yourself
FPGA-based embedded development to achieve the VGA interface, has been adopted to verify.
Packet file list
(Preview for download)
VGA
...\bitinit.log
...\data
...\....\system.ucf
...\drivers
...\.......\PS2_v1_00_a
...\.......\...........\data
...\.......\...........\....\PS2_v2_1_0.mdd
...\.......\...........\....\PS2_v2_1_0.tcl
...\.......\...........\src
...\.......\...........\...\Makefile
...\.......\...........\...\PS2.c
...\.......\...........\...\PS2.h
...\.......\...........\...\PS2_selftest.c
...\.......\vga_cntl_v1_00_a
...\.......\................\data
...\.......\................\....\vga_cntl_v2_1_0.mdd
...\.......\................\....\vga_cntl_v2_1_0.tcl
...\.......\................\src
...\.......\................\...\Makefile
...\.......\................\...\vga_cntl.c
...\.......\................\...\vga_cntl.h
...\.......\................\...\vga_cntl_selftest.c
...\.......\vga_ctnl_v1_00_a
...\.......\................\data
...\.......\................\....\vga_ctnl_v2_1_0.mdd
...\.......\................\....\vga_ctnl_v2_1_0.tcl
...\.......\................\src
...\.......\................\...\Makefile
...\.......\................\...\vga_ctnl.c
...\.......\................\...\vga_ctnl.h
...\.......\................\...\vga_ctnl_selftest.c
...\etc
...\...\bitgen.ut
...\...\download.cmd
...\...\fast_runtime.opt
...\hdl
...\...\dcm_0_wrapper.vhd
...\...\debug_module_wrapper.vhd
...\...\dlmb_cntlr_wrapper.vhd
...\...\dlmb_wrapper.vhd
...\...\elaborate
...\...\.........\lmb_bram_elaborate_v1_00_a
...\...\.........\..........................\hdl
...\...\.........\..........................\...\vhdl
...\...\.........\..........................\...\....\lmb_bram_elaborate.vhd
...\...\.........\opb_bram_if_cntlr_1_bram_elaborate_v1_00_a
...\...\.........\..........................................\hdl
...\...\.........\..........................................\...\vhdl
...\...\.........\..........................................\...\....\opb_bram_if_cntlr_1_bram_elaborate.vhd
...\...\ilmb_cntlr_wrapper.vhd
...\...\ilmb_wrapper.vhd
...\...\leds_wrapper.vhd
...\...\led_7segment_wrapper.vhd
...\...\lmb_bram_wrapper.vhd
...\...\mb_opb_wrapper.vhd
...\...\microblaze_0_wrapper.vhd
...\...\opb_bram_if_cntlr_1_bram_wrapper.vhd
...\...\opb_bram_if_cntlr_1_wrapper.vhd
...\...\ps2_0_wrapper.vhd
...\...\push_buttons_wrapper.vhd
...\...\rs232_wrapper.vhd
...\...\system.vhd
...\...\system_stub.vhd
...\...\vga_cntl_0_wrapper.vhd
...\implementation
...\..............\bitgen.ut
...\..............\cache
...\..............\.....\cache.cat
...\..............\.....\dcm_0_wrapper.ngc
...\..............\.....\debug_module_wrapper.ngc
...\..............\.....\dlmb_cntlr_wrapper.ngc
...\..............\.....\dlmb_wrapper.ngc
...\..............\.....\ilmb_cntlr_wrapper.ngc
...\..............\.....\ilmb_wrapper.ngc
...\..............\.....\leds_wrapper.ngc
...\..............\.....\led_7segment_wrapper.ngc
...\..............\.....\lmb_bram_wrapper.ngc
...\..............\.....\mb_opb_wrapper.ngc
...\..............\.....\microblaze_0_wrapper.ngc
...\..............\.....\opb_bram_if_cntlr_1_bram_wrapper.ngc
...\..............\.....\opb_bram_if_cntlr_1_wrapper.ngc
...\..............\.....\ps2_0_wrapper.ngc
...\..............\.....\push_buttons_wrapper.ngc
...\..............\.....\rs232_wrapper.ngc
...\..............\.....\vga_cntl_0_wrapper.ngc
...\..............\dcm_0_wrapper
...\..............\.............\dcm_0_wrapper.ngc
...\..............\dcm_0_wrapper.ngc
...\..............\debug_module_wrapper
...\..............\....................\debug_module_wrapper.ngc
...\..............\debug_module_wrapper.ngc
...\..............\dlmb_cntlr_wrapper
...\..............\..................\dlmb_cntlr_wrapper.ngc
...\..............\dlmb_cntlr_wrapper.ngc
...\..............\dlmb_wrapper
...\..............\............\dlmb_wrapper.ngc
...\..............\dlmb_wrapper.ngc
...\..............\download.bit
...\..............\fpga.flw
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