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vhd-train

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
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Introduction - If you have any usage issues, please Google them yourself
These are the FPGA resources of a write, I hope all of you to help ah
Packet file list
(Preview for download)
VHDL培训教材及参考例程
......................\VHDL Programming by Example(McGraw.Hill著 电子版)(1).zip
......................\VHDL Programming by Example(McGraw.Hill著 电子版).zip
......................\VHDL参考手册(Doulos公司).pdf
......................\VHDL参考手册(Doulos公司).zip
......................\VHDL培训教材.pdf
......................\VHDL多媒体式教学资料(aldec公司).zip
......................\vhdl实例
......................\........\8位总线收发器:74245.txt
......................\........\8位相等比较器.txt
......................\........\fifo存储器举例:(注3).txt
......................\........\LED七段译码.txt
......................\........\readme.txt
......................\........\VHDL基本语法
......................\........\............\元件例化与层次设计.txt
......................\........\............\加法器:generate语句的应用.txt
......................\........\............\将16进制转化为std_logic.txt
......................\........\............\无符号数到整数的转换.vhd
......................\........\............\条件赋值:使用when else语句.vhd
......................\........\............\条件赋值:使用列举类型.vhd
......................\........\............\条件赋值:使用多路选择器.vhd
......................\........\............\计数器:generate语句的应用.txt
......................\........\............\计数器:GENERIC语句的应用.txt
......................\........\............\计数器:std_logic_unsigned的用法.txt
......................\........\............\计数器:wait语句的应用.txt
......................\........\VHDL程序范例使用说明.doc
......................\........\一个游戏程序.vhd
......................\........\一个简单的UART.vhd
......................\........\一个简单的状态机.vhd
......................\........\三人表决器(三种不同的描述方式).txt
......................\........\三态总线(注2).txt
......................\........\伪随机数产生器.vhd
......................\........\伪随机比特发生器.txt
......................\........\使用列举类型的状态机.vhd
......................\........\使用变量的状态机.txt
......................\........\加法器描述.txt
......................\........\加法器源程序.v
......................\........\加法器源程序.vhd
......................\........\双2-4译码器:74139.txt
......................\........\双向总线(注2).txt
......................\........\各种功能的计数器.vhd
......................\........\四D触发器74175.txt
......................\........\地址译码(for m68008).txt
......................\........\多路选择器(使用when-else语句).txt
......................\........\布斯乘法器.txt
......................\........\带load、clr等功能的寄存器.vhd
......................\........\带三态输出的8位D寄存器:74374.txt
......................\........\带同步复位的状态机.txt
......................\........\带莫尔_米勒输出的状态机.txt
......................\........\最高优先级编码器.txt
......................\........\步进电机控制器.vhd
......................\........\汉明纠错吗编码器.txt
......................\........\汉明纠错吗译码器.txt
......................\........\波形发生器(含test beach).vhd
......................\........\直流电机控制器.vhd
......................\........\相应加法器的测试向量(test bench).vhd
......................\........\移位寄存器:74164.txt
......................\........\简单的12位寄存器.vhd
......................\........\简单的锁存器.vhd
......................\........\米勒型状态机.txt
......................\........\经典双进程状态机(含test beach).txt
......................\........\莫尔型状态机1.txt
......................\........\莫尔型状态机2.txt
......................\........\通用寄存器.txt
......................\VHDL简介.doc
......................\台湾国家晶元设计中心VHDL内部培训资料(CIC).zip
......................\在VHDL中使用层次设计(Cypress).pdf
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