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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 26kb
  • Downloaded :0次
  • Author :gong****
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verilog, TMSC6415 S unit code
Packet file list
(Preview for download)
08.4.28最终版本
...............\clr_set.v
...............\dc_plus_s.v
...............\dc_s_decode.v
...............\logical.v
...............\MIX.v
...............\SHR2_SHRU2.v
...............\simd_adder16.v
...............\sshl.v
...............\S_Adder_32.v
...............\S_Adder_8.v
...............\S_bit.v
...............\S_Control.v
...............\S_Left_Shifter.v
...............\S_logi.v
...............\S_math.v
...............\S_PACK.v
...............\S_Right_Shifter.v
...............\S_Right_Shifter_16.v
...............\S_simd.v
...............\S_syn.v
...............\S_Unit.v
...............\S_UPACK.v
...............\修改记录.txt
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