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XILINX_ML505_REVA_ASSY_110306
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Category :
VHDL-FPGA-Verilog
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Update : 2012-11-26
Size : 13.42mb
Downloaded :0次
Author :
李***
About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
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XILINX
Packet file list
(Preview for download)
art_aper.txt
art_param.txt
ASSEMBLY.art
ASSEMBLY.dxf
assembly.pdf
ASSY-TOP2.dxf
ASSY_BOT.art
ASSY_BOT.dxf
assy_bot.pdf
ASSY_TOP.art
ASSY_TOP.dxf
assy_top.pdf
ASSY_TOP2.art
assy_top2.pdf
drc.rpt
FAB_DWG.art
FAB_DWG.dxf
FAB_DWG.pdf
final_report.rpt
L10_SIG.art
L11_SIG.art
L12_GND.art
L13_PWR.art
L14_BOTTOM.art
L1_TOP.art
L2_PWR.art
L3_GND.art
L4_SIG.art
L5_SIG.art
L6_GND.art
L7_SIG.art
L8_SIG.art
L9_GND.art
MASK_BOT.art
MASK_TOP.art
nc_param.txt
PASTE_BOT.art
PASTE_TOP.art
PCB_ML505_100306-1-14.drl
PCB_ML505_102006.ipc
PCB_ML505_110306.pdf
SILK_BOT.art
SILK_TOP.art
xy_placement.rpt
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