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firshuzilvboqi

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 7kb
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  • Author :佘***
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: This paper presents FPGA-based FIR digital filter design and realization of the design using Matlab toolbox window function designed FIR filter coefficient calculation, and through VHDL hierarchical design methodology, FPGA and MCU at the same time the organic combination of the use of C51 and VHDL language modular design concepts and optimize the programming, the effective realization of the keyboard to set the parameters and the LCD display. The results show that this structure can be further improved to achieve rapid data processing and effective controls, improved design flexibility, reliability and scalability features.
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firshuzilvboqi.doc
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