Other resource List Page 2860

Other resource list

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RomSerch Downloaded：0: The code to achieve a single-bus device identification line dynamic functions, which can also identify a number of single-bus devices
Update : 2008-10-13 Size : 1.78kb Publisher : 蔡彬彬
gp Downloaded：0: Chaotic time series prediction by using gp algorithm for embedding dimension and fractal dimension.
Update : 2008-10-13 Size : 2.85kb Publisher : 章楷桦
people_and_dog Downloaded：0: A jogger in the plane along the path he likes running, a dog suddenly attacked him, the dog ran at constant speed running, the dog always point to the direction of running, and calculate and draw the dog
Update : 2008-10-13 Size : 816byte Publisher : mtvqqkk007
menu Downloaded：0: The menu process 8051 based on single chip and liquid crystal 1602 can be directly downloaded to use, has good scalability
Update : 2008-10-13 Size : 6.69kb Publisher : 蔡彬彬
Lyapunov Downloaded：0: Chaos Lyapunov index calculation to determine indicators of the matlab program.
Update : 2008-10-13 Size : 2.87kb Publisher : 章楷桦
cpld Downloaded：0: Based on CPLD XC95018 developed section of VHDL code, can realize more than 8051 mutual communication, single-chip microcomputer system for the design of multi-reference value is
Update : 2008-10-13 Size : 886.57kb Publisher : 蔡彬彬
fibonacci_2 Downloaded：0: This procedure is the realization of Memorandum of Law calculated the Fibonacci sequence, greatly reducing the computing time.
Update : 2008-10-13 Size : 997byte Publisher : djz
Source Downloaded：0: uCOSII source, ha ha you would like of course, well I
Update : 2008-10-13 Size : 64.96kb Publisher : 樊旭
lcs Downloaded：0: This procedure calculated the two longest sequences in public sequence LCS
Update : 2008-10-13 Size : 1.05kb Publisher : djz
adgal Downloaded：0: This code can be used as a programmable logic device ATF16V8B reference examples, and realize a variety of non-logical
Update : 2008-10-13 Size : 1013byte Publisher : 蔡彬彬
TSP40 Downloaded：0: Traveling salesman problem tsp
Update : 2008-10-13 Size : 2.89kb Publisher : ranee
CPU Downloaded：0: Use verilog as CPU design language to implement the CPU of the five-stage pipeline of single-data channel. There are 32 common registers, one program counter PC, one FLAG register FLAG, one STACK register STACK. Memory a
Update : 2008-10-13 Size : 42.46kb Publisher : haotianr

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