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to SPCE061A (Single Chip Micyoco) at the core, DDS technology through the design of an arbitrary value of Step-conditioned multi-purpose signal source. The signal source in a KHz- 10MHz range stability can be adjustable
Update : 2008-10-13 Size : 508.14kb Publisher : 陈朋

Downloaded:0
cf Galaxy Galaxy is a very good free P2P file-sharing software, While on the network to share and download the most popular form of BT, But BT is not immediately find seeds will be, but if the seed is too old can also do
Update : 2008-10-13 Size : 1.62mb Publisher : 杰克逊

Downloaded:0
com established application menu, the main menu for the show. Windows system for mobile use
Update : 2008-10-13 Size : 12.59kb Publisher : rrr

Downloaded:0
own procedures for the preparation of the Matlab solve robot path planning. Welcome to the exhibitions.
Update : 2008-10-13 Size : 17.73kb Publisher : ddr

Downloaded:0
This build is for developing a "binary-to- BCD "converter for use in// displaying numeral 's in base-10 so that people can read and interpre not the// numbers more readily than they could if t he numbers were displayed i
Update : 2008-10-13 Size : 41.46kb Publisher : 陈朋

Downloaded:0
/* This program generates the DApkg.vhd fi le that is used to define the DA* filter core and g ives its parameters and the contents of the Dis* tributed Arithmetic Look-up-table "DALUT" ac cording to the DA algorithm
Update : 2008-10-13 Size : 15.23kb Publisher : 陈朋

Downloaded:1
IDCT-M is a medium speed 1D IDCT core-- it ca n accept a continuous stream of 12-bit input word 's at a rate of-- 1 bit/ck cycle, operating at 50MHz speed, it can process MP @ ML MPEG video-- the core is 100 % synthesiza
Update : 2008-10-13 Size : 10.48kb Publisher : 陈朋

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-- Title : Barrel Shifter (Pure combinational)-- This VH DL design file is an open design you can redistri bute it and/or-- modify it and/or implement it a fter contacting the author-- You can check the d raft license at
Update : 2008-10-13 Size : 1.98kb Publisher : 陈朋

Downloaded:0
interleaver that interleaver, which contains C, VHDL, VRILOG HDL three languages to write the interleaver, including a variety of combinations to depend species, a detailed description, is a rare study of the materials a
Update : 2008-10-13 Size : 352.46kb Publisher : 陈朋

Downloaded:1
This April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete
Update : 2008-10-13 Size : 1.69mb Publisher : 陈朋

Downloaded:0
fpupack.vhdpre_norm_addsub.vhdaddsub_28.vhdpost_norm_addsub.vhdpre_norm_mul.vhdmul_24.vhdvcom serial_mul.vhdpost_norm_mul.vhdpre_norm_div.vhdserial_div.vhdpost_norm_div.vhdpre_norm_sqrt.vhdsqrt
Update : 2008-10-13 Size : 466.47kb Publisher : 陈朋

Downloaded:0
BurchED B5- X300 Spartan2e using XC2S300e Top level device file for 6809 compatible syste m on a chip Designed with Xilinx XC2S300e Sparta n 2 FPGA. Implemented With BurchED B5- X300 FPGA board, B5-SRAM module, B5-CF mod
Update : 2008-10-13 Size : 596.35kb Publisher : 陈朋
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