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DE2_CCD_PIP

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 471kb
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  • Author :chu***
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Camera data acquisition program code, so that data images shown on the screen procedures.
Packet file list
(Preview for download)
DE2_CCD_PIP
...........\CCD_Capture.v
...........\DE2_CCD_PIP.asm.rpt
...........\DE2_CCD_PIP.cdf
...........\DE2_CCD_PIP.done
...........\DE2_CCD_PIP.fit.eqn
...........\DE2_CCD_PIP.fit.rpt
...........\DE2_CCD_PIP.fit.summary
...........\DE2_CCD_PIP.flow.rpt
...........\DE2_CCD_PIP.map.eqn
...........\DE2_CCD_PIP.map.rpt
...........\DE2_CCD_PIP.map.summary
...........\DE2_CCD_PIP.pin
...........\DE2_CCD_PIP.pof
...........\DE2_CCD_PIP.qpf
...........\DE2_CCD_PIP.qsf
...........\DE2_CCD_PIP.qws
...........\DE2_CCD_PIP.sof
...........\DE2_CCD_PIP.tan.rpt
...........\DE2_CCD_PIP.tan.summary
...........\DE2_CCD_PIP.v
...........\DE2_CCD_PIP_description.txt
...........\I2C_CCD_Config.v
...........\I2C_Controller.v
...........\Line_Buffer.v
...........\Mirror_Col_2X.v
...........\Mirror_Col_4X.v
...........\RAW2RGB_2X.v
...........\RAW2RGB_4X.v
...........\Reset_Delay.v
...........\Sdram_Control_4Port
...........\...................\command.v
...........\...................\control_interface.v
...........\...................\Sdram_Control_4Port.v
...........\...................\Sdram_FIFO.v
...........\...................\Sdram_Params.h
...........\...................\Sdram_PLL.v
...........\...................\sdr_data_path.v
...........\SEG7_LUT.v
...........\SEG7_LUT_8.v
...........\Stack_2X_RAM.v
...........\Stack_4X_RAM.v


...........\Stack_4X_RAM_waveforms.html
...........\VGA_Controller.v
...........\VGA_Param.h
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