Description: Verilog HDL-based design of multi-function digital clock, interested
- [8sizecomparator.Rar] - eight compared with the size of the VHDL
- [time_clock] - practical alarm the Verilog code. VHDL i
- [dszsj] - multifunction digital clock design, we w
- [GaussSmooth] - This procedure for the Gaussian smoothin
- [Freq] - Simple digital frequency meter, using Ve
- [digtalclk] - Using Altera s QuartusII procedures for
- [VerilogHDL_alarmclock] - Using Verilog HDL language, multi-functi
- [clock_design] - Digital Clock in Verilog code, quartusII
- [paobiao] - Digital stopwatch given the source code,
- [timer] - Learn easy to understand the basic Veril
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