Description: i2c bus controller ipcore, contains Testbench
- [MyJTAGForAvr] - EEPROM and flash is a self-made JTAG sou
- [i2c(FPGA).Rar] - FPGA-based I2C bus simulation, using ver
- [I2C0001] - FPGA-based procedures I2C 0001, a very g
- [uart_core] - RS232 UART IPCORE for sopc builder
- [CpldandEepromI2c] - verilog I2c agreement prepared by the pr
- [i2c_slave_con] - can support continuous reading i2cslave
- [wb_i2c_tb] - I2C EEPROM simulation of VHDL code. If c
- [i2c] - I2C is an engineering application that i
- [I2C_hardware] - i2c hardware communication routines, lpc
- [oc_i2c_masterI2CIP] - ********* OC_I2C_Master use*********** u
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