Description: This paper summarizes the main points of CIC filter theory, introduced the CIC filter design using FPGA basic ways in which filter parameters can be arbitrary according to the actual needs change, the simulation node to verify the reliability of the design and feasibility. Designed using the CIC filter has been used in DDC chips, also suitable for the next generation of high-frequency radar system requirements.
- [rom_des] - VHDL and VERILOG sourcecode and TESTBENC
- [cic] - hogenauer cic filter algorithm and its r
- [cicFilter] - FPGA-based CIC filter CIC filter in the
- [pll] - pll clock in the FPGA to achieve the sou
- [ps2_keyboard] - ps2 keyboard verilog source code, to sup
- [pulsecompression] - External control in accordance with inst
- [CIC] - VHDL internal training materials (CIC).
- [DigitalPLL] - Introduce the basic structure of digital
- [CIC_DEC_6] - CIC decimation filter design, CIC filter
File list (Check if you may need any files):